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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 | Altera SOCFPGA Arria10 FPGA Manager Required properties: - compatible : should contain "altr,socfpga-a10-fpga-mgr" - reg : base address and size for memory mapped io. - The first index is for FPGA manager register access. - The second index is for writing FPGA configuration data. - resets : Phandle and reset specifier for the device's reset. - clocks : Clocks used by the device. Example: fpga_mgr: fpga-mgr@ffd03000 { compatible = "altr,socfpga-a10-fpga-mgr"; reg = <0xffd03000 0x100 0xffcfe400 0x20>; clocks = <&l4_mp_clk>; resets = <&rst FPGAMGR_RESET>; }; |