Documentation / devicetree / bindings / display / samsung / samsung,exynos-hdmi.yaml


Based on kernel version 6.9. Page generated on 2024-05-14 10:02 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226
# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos SoC HDMI

maintainers:
  - Inki Dae <inki.dae@samsung.com>
  - Seung-Woo Kim <sw0312.kim@samsung.com>
  - Kyungmin Park <kyungmin.park@samsung.com>
  - Krzysztof Kozlowski <krzk@kernel.org>

properties:
  compatible:
    enum:
      - samsung,exynos4210-hdmi
      - samsung,exynos4212-hdmi
      - samsung,exynos5420-hdmi
      - samsung,exynos5433-hdmi

  clocks:
    minItems: 5
    maxItems: 10

  clock-names:
    minItems: 5
    maxItems: 10

  ddc:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to the HDMI DDC node.

  hdmi-en-supply:
    description:
      Provides voltage source for DCC lines available on HDMI connector. When
      there is no power provided for DDC epprom, some TV-sets do not pulls up
      HPD (hot plug detect) line, what causes HDMI block to stay turned off.
      When provided, the regulator allows TV-set correctly signal HPD event.

  hpd-gpios:
    maxItems: 1
    description:
      A GPIO line connected to HPD

  interrupts:
    maxItems: 1

  phy:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: Phandle to the HDMI PHY node.

  ports:
    $ref: /schemas/graph.yaml#/properties/ports
    description:
      Contains a port which is connected to mic node.

  power-domains:
    maxItems: 1

  reg:
    maxItems: 1

  samsung,syscon-phandle:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to the PMU system controller node.

  samsung,sysreg-phandle:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Phandle to DISP system controller interface.
 
  '#sound-dai-cells':
    const: 0

  vdd-supply:
    description:
      VDD 1.0V HDMI TX.

  vdd_osc-supply:
    description:
      VDD 1.8V HDMI OSC.

  vdd_pll-supply:
    description:
      VDD 1.0V HDMI PLL.

required:
  - compatible
  - clocks
  - clock-names
  - ddc
  - hpd-gpios
  - interrupts
  - phy
  - reg
  - samsung,syscon-phandle
  - '#sound-dai-cells'
  - vdd-supply
  - vdd_osc-supply
  - vdd_pll-supply

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos5433-hdmi
    then:
      properties:
        clocks:
          items:
            - description: Gate of HDMI IP APB bus.
            - description: Gate of HDMI-PHY IP APB bus.
            - description: Gate of HDMI TMDS clock.
            - description: Gate of HDMI pixel clock.
            - description: TMDS clock generated by HDMI-PHY.
            - description: MUX used to switch between oscclk and tmds_clko,
                respectively if HDMI-PHY is off and operational.
            - description: Pixel clock generated by HDMI-PHY.
            - description: MUX used to switch between oscclk and pixel_clko,
                respectively if HDMI-PHY is off and operational.
            - description: Oscillator clock, used as parent of following *_user
                clocks in case HDMI-PHY is not operational.
            - description: Gate of HDMI SPDIF clock.
        clock-names:
          items:
            - const: hdmi_pclk
            - const: hdmi_i_pclk
            - const: i_tmds_clk
            - const: i_pixel_clk
            - const: tmds_clko
            - const: tmds_clko_user
            - const: pixel_clko
            - const: pixel_clko_user
            - const: oscclk
            - const: i_spdif_clk
      required:
        - samsung,sysreg-phandle
    else:
      properties:
        clocks:
          items:
            - description: Gate of HDMI IP bus clock.
            - description: Gate of HDMI special clock.
            - description: Pixel special clock, one of the two possible inputs
                of HDMI clock mux.
            - description: HDMI PHY clock output, one of two possible inputs of
                HDMI clock mux.
            - description: It is required by the driver to switch between the 2
                parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable
                after configuration, parent is set to sclk_hdmiphy else
                sclk_pixel.
        clock-names:
          items:
            - const: hdmi
            - const: sclk_hdmi
            - const: sclk_pixel
            - const: sclk_hdmiphy
            - const: mout_hdmi

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/exynos5433.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
 
    hdmi@13970000 {
        compatible = "samsung,exynos5433-hdmi";
        reg = <0x13970000 0x70000>;
        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&cmu_disp CLK_PCLK_HDMI>,
                 <&cmu_disp CLK_PCLK_HDMIPHY>,
                 <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO>,
                 <&cmu_disp CLK_PHYCLK_HDMI_PIXEL>,
                 <&cmu_disp CLK_PHYCLK_HDMIPHY_TMDS_CLKO_PHY>,
                 <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_TMDS_CLKO_USER>,
                 <&cmu_disp CLK_PHYCLK_HDMIPHY_PIXEL_CLKO_PHY>,
                 <&cmu_disp CLK_MOUT_PHYCLK_HDMIPHY_PIXEL_CLKO_USER>,
                 <&xxti>,
                 <&cmu_disp CLK_SCLK_HDMI_SPDIF>;
        clock-names = "hdmi_pclk",
                      "hdmi_i_pclk",
                      "i_tmds_clk",
                      "i_pixel_clk",
                      "tmds_clko",
                      "tmds_clko_user",
                      "pixel_clko",
                      "pixel_clko_user",
                      "oscclk",
                      "i_spdif_clk";
        phy = <&hdmiphy>;
        ddc = <&hsi2c_11>;
        samsung,syscon-phandle = <&pmu_system_controller>;
        samsung,sysreg-phandle = <&syscon_disp>;
        #sound-dai-cells = <0>;
 
        hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
        vdd-supply = <&ldo6_reg>;
        vdd_osc-supply = <&ldo7_reg>;
        vdd_pll-supply = <&ldo6_reg>;
 
        ports {
            #address-cells = <1>;
            #size-cells = <0>;
 
            port@0 {
                reg = <0>;
                hdmi_to_tv: endpoint {
                    remote-endpoint = <&tv_to_hdmi>;
                };
            };
 
            port@1 {
                reg = <1>;
                hdmi_to_mhl: endpoint {
                    remote-endpoint = <&mhl_to_hdmi>;
                };
            };
        };
    };