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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 | * Device tree bindings for Texas instruments Keystone timer This document provides bindings for the 64-bit timer in the KeyStone architecture devices. The timer can be configured as a general-purpose 64-bit timer, dual general-purpose 32-bit timers. When configured as dual 32-bit timers, each half can operate in conjunction (chain mode) or independently (unchained mode) of each other. It is global timer is a free running up-counter and can generate interrupt when the counter reaches preset counter values. Documentation: https://www.ti.com/lit/ug/sprugv5a/sprugv5a.pdf Required properties: - compatible : should be "ti,keystone-timer". - reg : specifies base physical address and count of the registers. - interrupts : interrupt generated by the timer. - clocks : the clock feeding the timer clock. Example: timer@22f0000 { compatible = "ti,keystone-timer"; reg = <0x022f0000 0x80>; interrupts = <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>; clocks = <&clktimer15>; }; |