Based on kernel version 4.3. Page generated on 2015-11-02 12:44 EST.
1 * Marvell MMP Interrupt controller 2 3 Required properties: 4 - compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or 5 "mrvl,mmp2-mux-intc" 6 - reg : Address and length of the register set of the interrupt controller. 7 If the interrupt controller is intc, address and length means the range 8 of the whold interrupt controller. If the interrupt controller is mux-intc, 9 address and length means one register. Since address of mux-intc is in the 10 range of intc. mux-intc is secondary interrupt controller. 11 - reg-names : Name of the register set of the interrupt controller. It's 12 only required in mux-intc interrupt controller. 13 - interrupts : Should be the port interrupt shared by mux interrupts. It's 14 only required in mux-intc interrupt controller. 15 - interrupt-controller : Identifies the node as an interrupt controller. 16 - #interrupt-cells : Specifies the number of cells needed to encode an 17 interrupt source. 18 - mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt 19 controller. 20 - mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge 21 detection first. 22 23 Example: 24 intc: interrupt-controller@d4282000 { 25 compatible = "mrvl,mmp2-intc"; 26 interrupt-controller; 27 #interrupt-cells = <1>; 28 reg = <0xd4282000 0x1000>; 29 mrvl,intc-nr-irqs = <64>; 30 }; 31 32 intcmux4@d4282150 { 33 compatible = "mrvl,mmp2-mux-intc"; 34 interrupts = <4>; 35 interrupt-controller; 36 #interrupt-cells = <1>; 37 reg = <0x150 0x4>, <0x168 0x4>; 38 reg-names = "mux status", "mux mask"; 39 mrvl,intc-nr-irqs = <2>; 40 }; 41 42 * Marvell Orion Interrupt controller 43 44 Required properties 45 - compatible : Should be "marvell,orion-intc". 46 - #interrupt-cells: Specifies the number of cells needed to encode an 47 interrupt source. Supported value is <1>. 48 - interrupt-controller : Declare this node to be an interrupt controller. 49 - reg : Interrupt mask address. A list of 4 byte ranges, one per controller. 50 One entry in the list represents 32 interrupts. 51 52 Example: 53 54 intc: interrupt-controller { 55 compatible = "marvell,orion-intc", "marvell,intc"; 56 interrupt-controller; 57 #interrupt-cells = <1>; 58 reg = <0xfed20204 0x04>, 59 <0xfed20214 0x04>; 60 };