Documentation / devicetree / bindings / display / tegra / nvidia,tegra20-gr2d.yaml


Based on kernel version 6.9. Page generated on 2024-05-14 10:02 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-gr2d.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA 2D graphics engine

maintainers:
  - Thierry Reding <thierry.reding@gmail.com>
  - Jon Hunter <jonathanh@nvidia.com>

properties:
  $nodename:
    pattern: "^gr2d@[0-9a-f]+$"

  compatible:
    enum:
      - nvidia,tegra20-gr2d
      - nvidia,tegra30-gr2d
      - nvidia,tegra114-gr2d

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: module clock

  resets:
    items:
      - description: module reset
      - description: memory client hotflush reset

  reset-names:
    items:
      - const: 2d
      - const: mc

  iommus:
    maxItems: 1

  interconnects:
    maxItems: 4

  interconnect-names:
    maxItems: 4

  operating-points-v2: true

  power-domains:
    items:
      - description: phandle to the HEG or core power domain

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/tegra20-car.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/memory/tegra20-mc.h>
 
    gr2d@54140000 {
        compatible = "nvidia,tegra20-gr2d";
        reg = <0x54140000 0x00040000>;
        interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&tegra_car TEGRA20_CLK_GR2D>;
        resets = <&tegra_car 21>, <&mc TEGRA20_MC_RESET_2D>;
        reset-names = "2d", "mc";
    };