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Documentation / devicetree / bindings / dma / mmp-dma.txt




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Based on kernel version 3.13. Page generated on 2014-01-20 22:00 EST.

1	* MARVELL MMP DMA controller
2	
3	Marvell Peripheral DMA Controller
4	Used platfroms: pxa688, pxa910, pxa3xx, etc
5	
6	Required properties:
7	- compatible: Should be "marvell,pdma-1.0"
8	- reg: Should contain DMA registers location and length.
9	- interrupts: Either contain all of the per-channel DMA interrupts
10			or one irq for pdma device
11	- #dma-channels: Number of DMA channels supported by the controller.
12	
13	"marvell,pdma-1.0"
14	Used platfroms: pxa25x, pxa27x, pxa3xx, pxa93x, pxa168, pxa910, pxa688.
15	
16	Examples:
17	
18	/*
19	 * Each channel has specific irq
20	 * ICU parse out irq channel from ICU register,
21	 * while DMA controller may not able to distinguish the irq channel
22	 * Using this method, interrupt-parent is required as demuxer
23	 * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq,
24	 * 18~21 is ADMA irq
25	 */
26	pdma: dma-controller@d4000000 {
27		      compatible = "marvell,pdma-1.0";
28		      reg = <0xd4000000 0x10000>;
29		      interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
30		      interrupt-parent = <&intcmux32>;
31		      #dma-channels = <16>;
32	      };
33	
34	/*
35	 * One irq for all channels
36	 * Dmaengine driver (DMA controller) distinguish irq channel via
37	 * parsing internal register
38	 */
39	pdma: dma-controller@d4000000 {
40		      compatible = "marvell,pdma-1.0";
41		      reg = <0xd4000000 0x10000>;
42		      interrupts = <47>;
43		      #dma-channels = <16>;
44	      };
45	
46	
47	Marvell Two Channel DMA Controller used specifically for audio
48	Used platfroms: pxa688, pxa910
49	
50	Required properties:
51	- compatible: Should be "marvell,adma-1.0" or "marvell,pxa910-squ"
52	- reg: Should contain DMA registers location and length.
53	- interrupts: Either contain all of the per-channel DMA interrupts
54			or one irq for dma device
55	
56	"marvell,adma-1.0" used on pxa688
57	"marvell,pxa910-squ" used on pxa910
58	
59	Examples:
60	
61	/* each channel has specific irq */
62	adma0: dma-controller@d42a0800 {
63		      compatible = "marvell,adma-1.0";
64		      reg = <0xd42a0800 0x100>;
65		      interrupts = <18 19>;
66		      interrupt-parent = <&intcmux32>;
67	      };
68	
69	/* One irq for all channels */
70	squ: dma-controller@d42a0800 {
71		      compatible = "marvell,pxa910-squ";
72		      reg = <0xd42a0800 0x100>;
73		      interrupts = <46>;
74	      };
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