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Documentation / devicetree / bindings / dma / mv-xor.txt




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Based on kernel version 4.3. Page generated on 2015-11-02 12:45 EST.

1	* Marvell XOR engines
2	
3	Required properties:
4	- compatible: Should be "marvell,orion-xor" or "marvell,armada-380-xor"
5	- reg: Should contain registers location and length (two sets)
6	    the first set is the low registers, the second set the high
7	    registers for the XOR engine.
8	- clocks: pointer to the reference clock
9	
10	The DT node must also contains sub-nodes for each XOR channel that the
11	XOR engine has. Those sub-nodes have the following required
12	properties:
13	- interrupts: interrupt of the XOR channel
14	
15	The sub-nodes used to contain one or several of the following
16	properties, but they are now deprecated:
17	- dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations
18	- dmacap,memset to indicate that the XOR channel is capable of memset operations
19	- dmacap,xor to indicate that the XOR channel is capable of xor operations
20	- dmacap,interrupt to indicate that the XOR channel is capable of
21	  generating interrupts
22	
23	Example:
24	
25	xor@d0060900 {
26		compatible = "marvell,orion-xor";
27		reg = <0xd0060900 0x100
28		       0xd0060b00 0x100>;
29		clocks = <&coreclk 0>;
30		status = "okay";
31	
32		xor00 {
33		      interrupts = <51>;
34		};
35		xor01 {
36		      interrupts = <52>;
37		};
38	};
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