Documentation / devicetree / bindings / dma / mv-xor.txt

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Based on kernel version 3.9. Page generated on 2013-05-02 22:57 EST.

	* Marvell XOR engines
	
	Required properties:
	- compatible: Should be "marvell,orion-xor"
	- reg: Should contain registers location and length (two sets)
	    the first set is the low registers, the second set the high
	    registers for the XOR engine.
	- clocks: pointer to the reference clock
	
	The DT node must also contains sub-nodes for each XOR channel that the
	XOR engine has. Those sub-nodes have the following required
	properties:
	- interrupts: interrupt of the XOR channel
	
	And the following optional properties:
	- dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations
	- dmacap,memset to indicate that the XOR channel is capable of memset operations
	- dmacap,xor to indicate that the XOR channel is capable of xor operations
	
	Example:
	
	xor@d0060900 {
		compatible = "marvell,orion-xor";
		reg = <0xd0060900 0x100
		       0xd0060b00 0x100>;
		clocks = <&coreclk 0>;
		status = "okay";
	
		xor00 {
		      interrupts = <51>;
		      dmacap,memcpy;
		      dmacap,xor;
		};
		xor01 {
		      interrupts = <52>;
		      dmacap,memcpy;
		      dmacap,xor;
		      dmacap,memset;
		};
	};

• [ dma ]
• arm-pl330.txt
• atmel-dma.txt
• dma.txt
• fsl-imx-sdma.txt
• fsl-mxs-dma.txt
• mmp-dma.txt
• mv-xor.txt
• snps-dma.txt
• tegra20-apbdma.txt
•