Based on kernel version 3.9. Page generated on 2013-05-02 22:58 EST.
1 * Marvell PXA GPIO controller 2 3 Required properties: 4 - compatible : Should be "mrvl,pxa-gpio" or "mrvl,mmp-gpio" 5 - reg : Address and length of the register set for the device 6 - interrupts : Should be the port interrupt shared by all gpio pins. 7 There're three gpio interrupts in arch-pxa, and they're gpio0, 8 gpio1 and gpio_mux. There're only one gpio interrupt in arch-mmp, 9 gpio_mux. 10 - interrupt-name : Should be the name of irq resource. Each interrupt 11 binds its interrupt-name. 12 - interrupt-controller : Identifies the node as an interrupt controller. 13 - #interrupt-cells: Specifies the number of cells needed to encode an 14 interrupt source. 15 - gpio-controller : Marks the device node as a gpio controller. 16 - #gpio-cells : Should be one. It is the pin number. 17 18 Example: 19 20 gpio: gpio@d4019000 { 21 compatible = "mrvl,mmp-gpio"; 22 reg = <0xd4019000 0x1000>; 23 interrupts = <49>; 24 interrupt-name = "gpio_mux"; 25 gpio-controller; 26 #gpio-cells = <1>; 27 interrupt-controller; 28 #interrupt-cells = <1>; 29 }; 30 31 * Marvell Orion GPIO Controller 32 33 Required properties: 34 - compatible : Should be "marvell,orion-gpio" 35 - reg : Address and length of the register set for controller. 36 - gpio-controller : So we know this is a gpio controller. 37 - ngpio : How many gpios this controller has. 38 - interrupts : Up to 4 Interrupts for the controller. 39 40 Optional properties: 41 - mask-offset : For SMP Orions, offset for Nth CPU 42 43 Example: 44 45 gpio0: gpio@10100 { 46 compatible = "marvell,orion-gpio"; 47 #gpio-cells = <2>; 48 gpio-controller; 49 reg = <0x10100 0x40>; 50 ngpio = <32>; 51 interrupts = <35>, <36>, <37>, <38>; 52 };