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Documentation / devicetree / bindings / lpddr2 / lpddr2.txt




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Based on kernel version 3.16. Page generated on 2014-08-06 21:37 EST.

1	* LPDDR2 SDRAM memories compliant to JEDEC JESD209-2
2	
3	Required properties:
4	- compatible : Should be one of - "jedec,lpddr2-nvm", "jedec,lpddr2-s2",
5	  "jedec,lpddr2-s4"
6	
7	  "ti,jedec-lpddr2-s2" should be listed if the memory part is LPDDR2-S2 type
8	
9	  "ti,jedec-lpddr2-s4" should be listed if the memory part is LPDDR2-S4 type
10	
11	  "ti,jedec-lpddr2-nvm" should be listed if the memory part is LPDDR2-NVM type
12	
13	- density  : <u32> representing density in Mb (Mega bits)
14	
15	- io-width : <u32> representing bus width. Possible values are 8, 16, and 32
16	
17	Optional properties:
18	
19	The following optional properties represent the minimum value of some AC
20	timing parameters of the DDR device in terms of number of clock cycles.
21	These values shall be obtained from the device data-sheet.
22	- tRRD-min-tck
23	- tWTR-min-tck
24	- tXP-min-tck
25	- tRTP-min-tck
26	- tCKE-min-tck
27	- tRPab-min-tck
28	- tRCD-min-tck
29	- tWR-min-tck
30	- tRASmin-min-tck
31	- tCKESR-min-tck
32	- tFAW-min-tck
33	
34	Child nodes:
35	- The lpddr2 node may have one or more child nodes of type "lpddr2-timings".
36	  "lpddr2-timings" provides AC timing parameters of the device for
37	  a given speed-bin. The user may provide the timings for as many
38	  speed-bins as is required. Please see Documentation/devicetree/
39	  bindings/lpddr2/lpddr2-timings.txt for more information on "lpddr2-timings"
40	
41	Example:
42	
43	elpida_ECB240ABACN : lpddr2 {
44		compatible	= "Elpida,ECB240ABACN","jedec,lpddr2-s4";
45		density		= <2048>;
46		io-width	= <32>;
47	
48		tRPab-min-tck	= <3>;
49		tRCD-min-tck	= <3>;
50		tWR-min-tck	= <3>;
51		tRASmin-min-tck	= <3>;
52		tRRD-min-tck	= <2>;
53		tWTR-min-tck	= <2>;
54		tXP-min-tck	= <2>;
55		tRTP-min-tck	= <2>;
56		tCKE-min-tck	= <3>;
57		tCKESR-min-tck	= <3>;
58		tFAW-min-tck	= <8>;
59	
60		timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
61			compatible	= "jedec,lpddr2-timings";
62			min-freq	= <10000000>;
63			max-freq	= <400000000>;
64			tRPab		= <21000>;
65			tRCD		= <18000>;
66			tWR		= <15000>;
67			tRAS-min	= <42000>;
68			tRRD		= <10000>;
69			tWTR		= <7500>;
70			tXP		= <7500>;
71			tRTP		= <7500>;
72			tCKESR		= <15000>;
73			tDQSCK-max	= <5500>;
74			tFAW		= <50000>;
75			tZQCS		= <90000>;
76			tZQCL		= <360000>;
77			tZQinit		= <1000000>;
78			tRAS-max-ns	= <70000>;
79		};
80	
81		timings_elpida_ECB240ABACN_200mhz: lpddr2-timings@1 {
82			compatible	= "jedec,lpddr2-timings";
83			min-freq	= <10000000>;
84			max-freq	= <200000000>;
85			tRPab		= <21000>;
86			tRCD		= <18000>;
87			tWR		= <15000>;
88			tRAS-min	= <42000>;
89			tRRD		= <10000>;
90			tWTR		= <10000>;
91			tXP		= <7500>;
92			tRTP		= <7500>;
93			tCKESR		= <15000>;
94			tDQSCK-max	= <5500>;
95			tFAW		= <50000>;
96			tZQCS		= <90000>;
97			tZQCL		= <360000>;
98			tZQinit		= <1000000>;
99			tRAS-max-ns	= <70000>;
100		};
101	
102	}
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