Documentation / devicetree / bindings / mailbox / mediatek,gce-mailbox.yaml


Based on kernel version 6.8. Page generated on 2024-03-11 21:26 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Mediatek Global Command Engine Mailbox

maintainers:
  - Houlong Wei <houlong.wei@mediatek.com>

description:
  The Global Command Engine (GCE) is used to help read/write registers with
  critical time limitation, such as updating display configuration during the
  vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.

properties:
  compatible:
    oneOf:
      - enum:
          - mediatek,mt6779-gce
          - mediatek,mt8173-gce
          - mediatek,mt8183-gce
          - mediatek,mt8186-gce
          - mediatek,mt8188-gce
          - mediatek,mt8192-gce
          - mediatek,mt8195-gce
      - items:
          - const: mediatek,mt6795-gce
          - const: mediatek,mt8173-gce
 
  "#mbox-cells":
    const: 2
    description:
      The first cell describes the Thread ID of the GCE,
      the second cell describes the priority of the GCE thread

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: Global Command Engine clock

  clock-names:
    items:
      - const: gce

required:
  - compatible
  - "#mbox-cells"
  - reg
  - interrupts
  - clocks

allOf:
  - if:
      not:
        properties:
          compatible:
            contains:
              const: mediatek,mt8195-gce
    then:
      required:
        - clock-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/mt8173-clk.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>
 
    soc {
        #address-cells = <2>;
        #size-cells = <2>;
 
        gce: mailbox@10212000 {
            compatible = "mediatek,mt8173-gce";
            reg = <0 0x10212000 0 0x1000>;
            interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
            #mbox-cells = <2>;
            clocks = <&infracfg CLK_INFRA_GCE>;
            clock-names = "gce";
        };
    };