Documentation / devicetree / bindings / media / rockchip-rga.yaml


Based on kernel version 6.8. Page generated on 2024-03-11 21:26 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/rockchip-rga.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip 2D raster graphic acceleration controller (RGA)

description:
  RGA is a standalone 2D raster graphic acceleration unit. It accelerates 2D
  graphics operations, such as point/line drawing, image scaling, rotation,
  BitBLT, alpha blending and image blur/sharpness.

maintainers:
  - Jacob Chen <jacob-chen@iotwrt.com>
  - Ezequiel Garcia <ezequiel@collabora.com>

properties:
  compatible:
    oneOf:
      - const: rockchip,rk3288-rga
      - const: rockchip,rk3399-rga
      - items:
          - enum:
              - rockchip,rk3228-rga
              - rockchip,rk3568-rga
          - const: rockchip,rk3288-rga

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 3

  clock-names:
    items:
      - const: aclk
      - const: hclk
      - const: sclk

  power-domains:
    maxItems: 1

  resets:
    maxItems: 3

  reset-names:
    items:
      - const: core
      - const: axi
      - const: ahb

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - resets
  - reset-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/rk3399-cru.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/rk3399-power.h>
    rga: rga@ff680000 {
      compatible = "rockchip,rk3399-rga";
      reg = <0xff680000 0x10000>;
      interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
      clocks = <&cru ACLK_RGA>,
               <&cru HCLK_RGA>,
               <&cru SCLK_RGA_CORE>;
      clock-names = "aclk", "hclk", "sclk";
      power-domains = <&power RK3399_PD_RGA>;
      resets = <&cru SRST_RGA_CORE>,
               <&cru SRST_A_RGA>,
               <&cru SRST_H_RGA>;
      reset-names = "core", "axi", "ahb";
    };