Documentation / devicetree / bindings / net / stm32-dwmac.txt


Based on kernel version 5.7.10. Page generated on 2020-07-23 22:17 EST.

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STMicroelectronics STM32 / MCU DWMAC glue layer controller

This file documents platform glue layer for stmmac.
Please see stmmac.txt for the other unchanged properties.

The device node has following properties.

Required properties:
- compatible:  For MCU family should be "st,stm32-dwmac" to select glue, and
	       "snps,dwmac-3.50a" to select IP version.
	       For MPU family should be "st,stm32mp1-dwmac" to select
	       glue, and "snps,dwmac-4.20a" to select IP version.
- clocks: Must contain a phandle for each entry in clock-names.
- clock-names: Should be "stmmaceth" for the host clock.
	       Should be "mac-clk-tx" for the MAC TX clock.
	       Should be "mac-clk-rx" for the MAC RX clock.
	       For MPU family need to add also "ethstp" for power mode clock
- interrupt-names: Should contain a list of interrupt names corresponding to
           the interrupts in the interrupts property, if available.
		   Should be "macirq" for the main MAC IRQ
		   Should be "eth_wake_irq" for the IT which wake up system
- st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
	       encompases the glue register, and the offset of the control register.

Optional properties:
- clock-names:     For MPU family "eth-ck" for PHY without quartz
- st,eth-clk-sel (boolean) : set this property in RGMII PHY when you want to select RCC clock instead of ETH_CLK125.
- st,eth-ref-clk-sel (boolean) :  set this property in RMII mode when you have PHY without crystal 50MHz and want to select RCC clock instead of ETH_REF_CLK.

Example:

	ethernet@40028000 {
		compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
		reg = <0x40028000 0x8000>;
		reg-names = "stmmaceth";
		interrupts = <0 61 0>, <0 62 0>;
		interrupt-names = "macirq", "eth_wake_irq";
		clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
		clocks = <&rcc 0 25>, <&rcc 0 26>, <&rcc 0 27>;
		st,syscon = <&syscfg 0x4>;
		snps,pbl = <8>;
		snps,mixed-burst;
		dma-ranges;
	};