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Documentation / devicetree / bindings / pinctrl / samsung-pinctrl.txt




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Based on kernel version 4.8. Page generated on 2016-10-06 23:13 EST.

1	Samsung GPIO and Pin Mux/Config controller
2	
3	Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
4	controller. It controls the input/output settings on the available pads/pins
5	and also provides ability to multiplex and configure the output of various
6	on-chip controllers onto these pads.
7	
8	Required Properties:
9	- compatible: should be one of the following.
10	  - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11	  - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12	  - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13	  - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14	  - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15	  - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
16	  - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
17	  - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
18	  - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
19	  - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.
20	  - "samsung,exynos5410-pinctrl": for Exynos5410 compatible pin-controller.
21	  - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
22	  - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
23	
24	- reg: Base address of the pin controller hardware module and length of
25	  the address space it occupies.
26	
27	- Pin banks as child nodes: Pin banks of the controller are represented by child
28	  nodes of the controller node. Bank name is taken from name of the node. Each
29	  bank node must contain following properties:
30	
31	  - gpio-controller: identifies the node as a gpio controller and pin bank.
32	  - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
33	    binding is used, the amount of cells must be specified as 2. See the below
34	    mentioned gpio binding representation for description of particular cells.
35	
36		Eg: <&gpx2 6 0>
37		<[phandle of the gpio controller node]
38		[pin number within the gpio controller]
39		[flags]>
40	
41		Values for gpio specifier:
42		- Pin number: is a value between 0 to 7.
43		- Flags: 0 - Active High
44			 1 - Active Low
45	
46	- Pin mux/config groups as child nodes: The pin mux (selecting pin function
47	  mode) and pin config (pull up/down, driver strength) settings are represented
48	  as child nodes of the pin-controller node. There should be atleast one
49	  child node and there is no limit on the count of these child nodes. It is
50	  also possible for a child node to consist of several further child nodes
51	  to allow grouping multiple pinctrl groups into one. The format of second
52	  level child nodes is exactly the same as for first level ones and is
53	  described below.
54	
55	  The child node should contain a list of pin(s) on which a particular pin
56	  function selection or pin configuration (or both) have to applied. This
57	  list of pins is specified using the property name "samsung,pins". There
58	  should be atleast one pin specfied for this property and there is no upper
59	  limit on the count of pins that can be specified. The pins are specified
60	  using pin names which are derived from the hardware manual of the SoC. As
61	  an example, the pins in GPA0 bank of the pin controller can be represented
62	  as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
63	  The format of the pin names should be (as per the hardware manual)
64	  "[pin bank name]-[pin number within the bank]".
65	
66	  The pin function selection that should be applied on the pins listed in the
67	  child node is specified using the "samsung,pin-function" property. The value
68	  of this property that should be applied to each of the pins listed in the
69	  "samsung,pins" property should be picked from the hardware manual of the SoC
70	  for the specified pin group. This property is optional in the child node if
71	  no specific function selection is desired for the pins listed in the child
72	  node. The value of this property is used as-is to program the pin-controller
73	  function selector register of the pin-bank.
74	
75	  The child node can also optionally specify one or more of the pin
76	  configuration that should be applied on all the pins listed in the
77	  "samsung,pins" property of the child node. The following pin configuration
78	  properties are supported.
79	
80	  - samsung,pin-val: Initial value of pin output buffer.
81	  - samsung,pin-pud: Pull up/down configuration.
82	  - samsung,pin-drv: Drive strength configuration.
83	  - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
84	  - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
85	
86	  The values specified by these config properties should be derived from the
87	  hardware manual and these values are programmed as-is into the pin
88	  pull up/down and driver strength register of the pin-controller.
89	
90	  Note: A child should include atleast a pin function selection property or
91	  pin configuration property (one or more) or both.
92	
93	  The client nodes that require a particular pin function selection and/or
94	  pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
95	  file.
96	
97	External GPIO and Wakeup Interrupts:
98	
99	The controller supports two types of external interrupts over gpio. The first
100	is the external gpio interrupt and second is the external wakeup interrupts.
101	The difference between the two is that the external wakeup interrupts can be
102	used as system wakeup events.
103	
104	A. External GPIO Interrupts: For supporting external gpio interrupts, the
105	   following properties should be specified in the pin-controller device node.
106	
107	   - interrupt-parent: phandle of the interrupt parent to which the external
108	     GPIO interrupts are forwarded to.
109	   - interrupts: interrupt specifier for the controller. The format and value of
110	     the interrupt specifier depends on the interrupt parent for the controller.
111	
112	   In addition, following properties must be present in node of every bank
113	   of pins supporting GPIO interrupts:
114	
115	   - interrupt-controller: identifies the controller node as interrupt-parent.
116	   - #interrupt-cells: the value of this property should be 2.
117	     - First Cell: represents the external gpio interrupt number local to the
118	       external gpio interrupt space of the controller.
119	     - Second Cell: flags to identify the type of the interrupt
120	       - 1 = rising edge triggered
121	       - 2 = falling edge triggered
122	       - 3 = rising and falling edge triggered
123	       - 4 = high level triggered
124	       - 8 = low level triggered
125	
126	B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
127	   child node representing the external wakeup interrupt controller should be
128	   included in the pin-controller device node. This child node should include
129	   the following properties.
130	
131	   - compatible: identifies the type of the external wakeup interrupt controller
132	     The possible values are:
133	     - samsung,s3c2410-wakeup-eint: represents wakeup interrupt controller
134	       found on Samsung S3C24xx SoCs except S3C2412 and S3C2413,
135	     - samsung,s3c2412-wakeup-eint: represents wakeup interrupt controller
136	       found on Samsung S3C2412 and S3C2413 SoCs,
137	     - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller
138	       found on Samsung S3C64xx SoCs,
139	     - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
140	       found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.
141	     - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller
142	       found on Samsung Exynos7 SoC.
143	   - interrupt-parent: phandle of the interrupt parent to which the external
144	     wakeup interrupts are forwarded to.
145	   - interrupts: interrupt used by multiplexed wakeup interrupts.
146	
147	   In addition, following properties must be present in node of every bank
148	   of pins supporting wake-up interrupts:
149	
150	   - interrupt-controller: identifies the node as interrupt-parent.
151	   - #interrupt-cells: the value of this property should be 2
152	     - First Cell: represents the external wakeup interrupt number local to
153	       the external wakeup interrupt space of the controller.
154	     - Second Cell: flags to identify the type of the interrupt
155	       - 1 = rising edge triggered
156	       - 2 = falling edge triggered
157	       - 3 = rising and falling edge triggered
158	       - 4 = high level triggered
159	       - 8 = low level triggered
160	
161	   Node of every bank of pins supporting direct wake-up interrupts (without
162	   multiplexing) must contain following properties:
163	
164	   - interrupt-parent: phandle of the interrupt parent to which the external
165	     wakeup interrupts are forwarded to.
166	   - interrupts: interrupts of the interrupt parent which are used for external
167	     wakeup interrupts from pins of the bank, must contain interrupts for all
168	     pins of the bank.
169	
170	Aliases:
171	
172	All the pin controller nodes should be represented in the aliases node using
173	the following format 'pinctrl{n}' where n is a unique number for the alias.
174	
175	Aliases for controllers compatible with "samsung,exynos7-pinctrl":
176	- pinctrl0: pin controller of ALIVE block,
177	- pinctrl1: pin controller of BUS0 block,
178	- pinctrl2: pin controller of NFC block,
179	- pinctrl3: pin controller of TOUCH block,
180	- pinctrl4: pin controller of FF block,
181	- pinctrl5: pin controller of ESE block,
182	- pinctrl6: pin controller of FSYS0 block,
183	- pinctrl7: pin controller of FSYS1 block,
184	- pinctrl8: pin controller of BUS1 block,
185	- pinctrl9: pin controller of AUDIO block,
186	
187	Example: A pin-controller node with pin banks:
188	
189		pinctrl_0: pinctrl@11400000 {
190			compatible = "samsung,exynos4210-pinctrl";
191			reg = <0x11400000 0x1000>;
192			interrupts = <0 47 0>;
193	
194			/* ... */
195	
196			/* Pin bank without external interrupts */
197			gpy0: gpy0 {
198				gpio-controller;
199				#gpio-cells = <2>;
200			};
201	
202			/* ... */
203	
204			/* Pin bank with external GPIO or muxed wake-up interrupts */
205			gpj0: gpj0 {
206				gpio-controller;
207				#gpio-cells = <2>;
208	
209				interrupt-controller;
210				#interrupt-cells = <2>;
211			};
212	
213			/* ... */
214	
215			/* Pin bank with external direct wake-up interrupts */
216			gpx0: gpx0 {
217				gpio-controller;
218				#gpio-cells = <2>;
219	
220				interrupt-controller;
221				interrupt-parent = <&gic>;
222				interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
223					     <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
224				#interrupt-cells = <2>;
225			};
226	
227			/* ... */
228		};
229	
230	Example 1: A pin-controller node with pin groups.
231	
232		pinctrl_0: pinctrl@11400000 {
233			compatible = "samsung,exynos4210-pinctrl";
234			reg = <0x11400000 0x1000>;
235			interrupts = <0 47 0>;
236	
237			/* ... */
238	
239			uart0_data: uart0-data {
240				samsung,pins = "gpa0-0", "gpa0-1";
241				samsung,pin-function = <2>;
242				samsung,pin-pud = <0>;
243				samsung,pin-drv = <0>;
244			};
245	
246			uart0_fctl: uart0-fctl {
247				samsung,pins = "gpa0-2", "gpa0-3";
248				samsung,pin-function = <2>;
249				samsung,pin-pud = <0>;
250				samsung,pin-drv = <0>;
251			};
252	
253			uart1_data: uart1-data {
254				samsung,pins = "gpa0-4", "gpa0-5";
255				samsung,pin-function = <2>;
256				samsung,pin-pud = <0>;
257				samsung,pin-drv = <0>;
258			};
259	
260			uart1_fctl: uart1-fctl {
261				samsung,pins = "gpa0-6", "gpa0-7";
262				samsung,pin-function = <2>;
263				samsung,pin-pud = <0>;
264				samsung,pin-drv = <0>;
265			};
266	
267			i2c2_bus: i2c2-bus {
268				samsung,pins = "gpa0-6", "gpa0-7";
269				samsung,pin-function = <3>;
270				samsung,pin-pud = <3>;
271				samsung,pin-drv = <0>;
272			};
273	
274			sd4_bus8: sd4-bus-width8 {
275				part-1 {
276					samsung,pins = "gpk0-3", "gpk0-4",
277							"gpk0-5", "gpk0-6";
278					samsung,pin-function = <3>;
279					samsung,pin-pud = <3>;
280					samsung,pin-drv = <3>;
281				};
282				part-2 {
283					samsung,pins = "gpk1-3", "gpk1-4",
284							"gpk1-5", "gpk1-6";
285					samsung,pin-function = <4>;
286					samsung,pin-pud = <4>;
287					samsung,pin-drv = <3>;
288				};
289			};
290		};
291	
292	Example 2: A pin-controller node with external wakeup interrupt controller node.
293	
294		pinctrl_1: pinctrl@11000000 {
295			compatible = "samsung,exynos4210-pinctrl";
296			reg = <0x11000000 0x1000>;
297			interrupts = <0 46 0>
298	
299			/* ... */
300	
301			wakeup-interrupt-controller {
302				compatible = "samsung,exynos4210-wakeup-eint";
303				interrupt-parent = <&gic>;
304				interrupts = <0 32 0>;
305			};
306		};
307	
308	Example 3: A uart client node that supports 'default' and 'flow-control' states.
309	
310		uart@13800000 {
311			compatible = "samsung,exynos4210-uart";
312			reg = <0x13800000 0x100>;
313			interrupts = <0 52 0>;
314			pinctrl-names = "default", "flow-control;
315			pinctrl-0 = <&uart0_data>;
316			pinctrl-1 = <&uart0_data &uart0_fctl>;
317		};
318	
319	Example 4: Set up the default pin state for uart controller.
320	
321		static int s3c24xx_serial_probe(struct platform_device *pdev) {
322			struct pinctrl *pinctrl;
323	
324			/* ... */
325	
326			pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
327		}
328	
329	Example 5: A display port client node that supports 'default' pinctrl state
330		   and gpio binding.
331	
332		display-port-controller {
333			/* ... */
334	
335			samsung,hpd-gpio = <&gpx2 6 0>;
336			pinctrl-names = "default";
337			pinctrl-0 = <&dp_hpd>;
338		};
339	
340	Example 6: Request the gpio for display port controller
341	
342		static int exynos_dp_probe(struct platform_device *pdev)
343		{
344			int hpd_gpio, ret;
345			struct device *dev = &pdev->dev;
346			struct device_node *dp_node = dev->of_node;
347	
348			/* ... */
349	
350			hpd_gpio = of_get_named_gpio(dp_node, "samsung,hpd-gpio", 0);
351	
352			/* ... */
353	
354			ret = devm_gpio_request_one(&pdev->dev, hpd_gpio, GPIOF_IN,
355						    "hpd_gpio");
356			/* ... */
357		}
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