Documentation / devicetree / bindings / timer / cadence,ttc-timer.txt


Based on kernel version 5.7.10. Page generated on 2020-07-23 22:17 EST.

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Cadence TTC - Triple Timer Counter

Required properties:
- compatible : Should be "cdns,ttc".
- reg : Specifies base physical address and size of the registers.
- interrupts : A list of 3 interrupts; one per timer channel.
- clocks: phandle to the source clock

Optional properties:
- timer-width: Bit width of the timer, necessary if not 16.

Example:

ttc0: ttc0@f8001000 {
	interrupt-parent = <&intc>;
	interrupts = < 0 10 4 0 11 4 0 12 4 >;
	compatible = "cdns,ttc";
	reg = <0xF8001000 0x1000>;
	clocks = <&cpu_clk 3>;
	timer-width = <32>;
};