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Documentation / devicetree / bindings / timer / cadence,ttc-timer.txt




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Based on kernel version 4.8. Page generated on 2016-10-06 23:15 EST.

1	Cadence TTC - Triple Timer Counter
2	
3	Required properties:
4	- compatible : Should be "cdns,ttc".
5	- reg : Specifies base physical address and size of the registers.
6	- interrupts : A list of 3 interrupts; one per timer channel.
7	- clocks: phandle to the source clock
8	
9	Optional properties:
10	- timer-width: Bit width of the timer, necessary if not 16.
11	
12	Example:
13	
14	ttc0: ttc0@f8001000 {
15		interrupt-parent = <&intc>;
16		interrupts = < 0 10 4 0 11 4 0 12 4 >;
17		compatible = "cdns,ttc";
18		reg = <0xF8001000 0x1000>;
19		clocks = <&cpu_clk 3>;
20		timer-width = <32>;
21	};
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