Documentation / devicetree / bindings / crypto / aspeed,ast2600-acry.yaml


Based on kernel version 6.8. Page generated on 2024-03-11 21:26 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/crypto/aspeed,ast2600-acry.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ASPEED ACRY ECDSA/RSA Hardware Accelerator Engines

maintainers:
  - Neal Liu <neal_liu@aspeedtech.com>

description:
  The ACRY ECDSA/RSA engines is designed to accelerate the throughput
  of ECDSA/RSA signature and verification. Basically, ACRY can be
  divided into two independent engines - ECC Engine and RSA Engine.

properties:
  compatible:
    enum:
      - aspeed,ast2600-acry

  reg:
    items:
      - description: acry base address & size
      - description: acry sram base address & size

  clocks:
    maxItems: 1

  interrupts:
    maxItems: 1

required:
  - compatible
  - reg
  - clocks
  - interrupts

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/ast2600-clock.h>
    acry: crypto@1e6fa000 {
        compatible = "aspeed,ast2600-acry";
        reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;
        interrupts = <160>;
        clocks = <&syscon ASPEED_CLK_GATE_RSACLK>;
    };