Documentation / devicetree / bindings / crypto / atmel,at91sam9g46-sha.yaml


Based on kernel version 6.8. Page generated on 2024-03-11 21:26 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
%YAML 1.2
---
$id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-sha.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Atmel Secure Hash Algorithm (SHA) HW cryptographic accelerator

maintainers:
  - Tudor Ambarus <tudor.ambarus@linaro.org>

properties:
  compatible:
    const: atmel,at91sam9g46-sha

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    const: sha_clk

  dmas:
    maxItems: 1
    description: TX DMA Channel

  dma-names:
    const: tx

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/at91.h>
    #include <dt-bindings/dma/at91.h>
 
    sha: crypto@e1814000 {
      compatible = "atmel,at91sam9g46-sha";
      reg = <0xe1814000 0x100>;
      interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
      clocks = <&pmc PMC_TYPE_PERIPHERAL 83>;
      clock-names = "sha_clk";
      dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>;
      dma-names = "tx";
    };