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Documentation / devicetree / bindings / dma / ste-dma40.txt




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Based on kernel version 3.16. Page generated on 2014-08-06 21:36 EST.

1	* DMA40 DMA Controller
2	
3	Required properties:
4	- compatible: "stericsson,dma40"
5	- reg: Address range of the DMAC registers
6	- reg-names: Names of the above areas to use during resource look-up
7	- interrupt: Should contain the DMAC interrupt number
8	- #dma-cells: must be <3>
9	- memcpy-channels: Channels to be used for memcpy
10	
11	Optional properties:
12	- dma-channels: Number of channels supported by hardware - if not present
13			the driver will attempt to obtain the information from H/W
14	- disabled-channels: Channels which can not be used
15	
16	Example:
17	
18		dma: dma-controller@801C0000 {
19			compatible = "stericsson,db8500-dma40", "stericsson,dma40";
20			reg = <0x801C0000 0x1000  0x40010000 0x800>;
21			reg-names = "base", "lcpa";
22			interrupt-parent = <&intc>;
23			interrupts = <0 25 0x4>;
24	
25			#dma-cells = <2>;
26			memcpy-channels  = <56 57 58 59 60>;
27			disabled-channels  = <12>;
28			dma-channels = <8>;
29		};
30	
31	Clients
32	Required properties:
33	- dmas: Comma separated list of dma channel requests
34	- dma-names: Names of the aforementioned requested channels
35	
36	Each dmas request consists of 4 cells:
37	  1. A phandle pointing to the DMA controller
38	  2. Device Type
39	  3. The DMA request line number (only when 'use fixed channel' is set)
40	  4. A 32bit mask specifying; mode, direction and endianness [NB: This list will grow]
41	        0x00000001: Mode:
42	                Logical channel when unset
43	                Physical channel when set
44	        0x00000002: Direction:
45	                Memory to Device when unset
46	                Device to Memory when set
47	        0x00000004: Endianness:
48	                Little endian when unset
49	                Big endian when set
50	        0x00000008: Use fixed channel:
51	                Use automatic channel selection when unset
52	                Use DMA request line number when set
53	        0x00000010: Set channel as high priority:
54	                Normal priority when unset
55	                High priority when set
56	
57	Example:
58	
59		uart@80120000 {
60			compatible = "arm,pl011", "arm,primecell";
61			reg = <0x80120000 0x1000>;
62			interrupts = <0 11 0x4>;
63	
64			dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
65			       <&dma 13 0 0x0>; /* Logical - MemToDev */
66			dma-names = "rx", "rx";
67	
68			status = "disabled";
69		};
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