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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 | Device tree bindings for ARM PL353 static memory controller PL353 static memory controller supports two kinds of memory interfaces.i.e NAND and SRAM/NOR interfaces. The actual devices are instantiated from the child nodes of pl353 smc node. Required properties: - compatible : Should be "arm,pl353-smc-r2p1", "arm,primecell". - reg : Controller registers map and length. - clock-names : List of input clock names - "memclk", "apb_pclk" (See clock bindings for details). - clocks : Clock phandles (see clock bindings for details). - address-cells : Must be 2. - size-cells : Must be 1. Child nodes: For NAND the "arm,pl353-nand-r2p1" and for NOR the "cfi-flash" drivers are supported as child nodes. for NAND partition information please refer the below file Documentation/devicetree/bindings/mtd/partition.txt Example: smcc: memory-controller@e000e000 compatible = "arm,pl353-smc-r2p1", "arm,primecell"; clock-names = "memclk", "apb_pclk"; clocks = <&clkc 11>, <&clkc 44>; reg = <0xe000e000 0x1000>; #address-cells = <2>; #size-cells = <1>; ranges = <0x0 0x0 0xe1000000 0x1000000 //Nand CS Region 0x1 0x0 0xe2000000 0x2000000 //SRAM/NOR CS Region 0x2 0x0 0xe4000000 0x2000000>; //SRAM/NOR CS Region nand_0: flash@e1000000 { compatible = "arm,pl353-nand-r2p1" reg = <0 0 0x1000000>; (...) }; nor0: flash@e2000000 { compatible = "cfi-flash"; reg = <1 0 0x2000000>; }; nor1: flash@e4000000 { compatible = "cfi-flash"; reg = <2 0 0x2000000>; }; }; |