Documentation / devicetree / bindings / phy / calxeda-combophy.yaml


Based on kernel version 6.8. Page generated on 2024-03-11 21:26 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/calxeda-combophy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Calxeda Highbank Combination PHYs for SATA

description: |
  The Calxeda Combination PHYs connect the SoC to the internal fabric
  and to SATA connectors. The PHYs support multiple protocols (SATA,
  SGMII, PCIe) and can be assigned to different devices (SATA or XGMAC
  controller).
  Programming the PHYs is typically handled by those device drivers,
  not by a dedicated PHY driver.

maintainers:
  - Andre Przywara <andre.przywara@arm.com>

properties:
  compatible:
    const: calxeda,hb-combophy
 
  '#phy-cells':
    const: 1

  reg:
    maxItems: 1

  phydev:
    description: device ID for programming the ComboPHY.
    $ref: /schemas/types.yaml#/definitions/uint32
    maximum: 31

required:
  - compatible
  - reg
  - phydev
  - '#phy-cells'

additionalProperties: false

examples:
  - |
    combophy5: combo-phy@fff5d000 {
                   compatible = "calxeda,hb-combophy";
                   #phy-cells = <1>;
                   reg = <0xfff5d000 0x1000>;
                   phydev = <31>;
               };