Based on kernel version 4.13.3. Page generated on 2017-09-23 13:55 EST.
1 MT8173 xHCI 2 3 The device node for Mediatek SOC USB3.0 host controller 4 5 There are two scenarios: the first one only supports xHCI driver; 6 the second one supports dual-role mode, and the host is based on xHCI 7 driver. Take account of backward compatibility, we divide bindings 8 into two parts. 9 10 1st: only supports xHCI driver 11 ------------------------------------------------------------------------ 12 13 Required properties: 14 - compatible : should contain "mediatek,mt8173-xhci" 15 - reg : specifies physical base address and size of the registers 16 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control 17 - interrupts : interrupt used by the controller 18 - power-domains : a phandle to USB power domain node to control USB's 19 mtcmos 20 - vusb33-supply : regulator of USB avdd3.3v 21 22 - clocks : a list of phandle + clock-specifier pairs, one for each 23 entry in clock-names 24 - clock-names : must contain 25 "sys_ck": for clock of xHCI MAC 26 "ref_ck": for reference clock of xHCI MAC 27 "wakeup_deb_p0": for USB wakeup debounce clock of port0 28 "wakeup_deb_p1": for USB wakeup debounce clock of port1 29 30 - phys : a list of phandle + phy specifier pairs 31 32 Optional properties: 33 - mediatek,wakeup-src : 1: ip sleep wakeup mode; 2: line state wakeup 34 mode; 35 - mediatek,syscon-wakeup : phandle to syscon used to access USB wakeup 36 control register, it depends on "mediatek,wakeup-src". 37 - vbus-supply : reference to the VBUS regulator; 38 - usb3-lpm-capable : supports USB3.0 LPM 39 - pinctrl-names : a pinctrl state named "default" must be defined 40 - pinctrl-0 : pin control group 41 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 42 43 Example: 44 usb30: usb@11270000 { 45 compatible = "mediatek,mt8173-xhci"; 46 reg = <0 0x11270000 0 0x1000>, 47 <0 0x11280700 0 0x0100>; 48 reg-names = "mac", "ippc"; 49 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; 50 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 51 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>, 52 <&pericfg CLK_PERI_USB0>, 53 <&pericfg CLK_PERI_USB1>; 54 clock-names = "sys_ck", "ref_ck", 55 "wakeup_deb_p0", 56 "wakeup_deb_p1"; 57 phys = <&phy_port0 PHY_TYPE_USB3>, 58 <&phy_port1 PHY_TYPE_USB2>; 59 vusb33-supply = <&mt6397_vusb_reg>; 60 vbus-supply = <&usb_p1_vbus>; 61 usb3-lpm-capable; 62 mediatek,syscon-wakeup = <&pericfg>; 63 mediatek,wakeup-src = <1>; 64 }; 65 66 2nd: dual-role mode with xHCI driver 67 ------------------------------------------------------------------------ 68 69 In the case, xhci is added as subnode to mtu3. An example and the DT binding 70 details of mtu3 can be found in: 71 Documentation/devicetree/bindings/usb/mt8173-mtu3.txt 72 73 Required properties: 74 - compatible : should contain "mediatek,mt8173-xhci" 75 - reg : specifies physical base address and size of the registers 76 - reg-names: should be "mac" for xHCI MAC 77 - interrupts : interrupt used by the host controller 78 - power-domains : a phandle to USB power domain node to control USB's 79 mtcmos 80 - vusb33-supply : regulator of USB avdd3.3v 81 82 - clocks : a list of phandle + clock-specifier pairs, one for each 83 entry in clock-names 84 - clock-names : must be 85 "sys_ck": for clock of xHCI MAC 86 "ref_ck": for reference clock of xHCI MAC 87 88 Optional properties: 89 - vbus-supply : reference to the VBUS regulator; 90 - usb3-lpm-capable : supports USB3.0 LPM 91 92 Example: 93 usb30: usb@11270000 { 94 compatible = "mediatek,mt8173-xhci"; 95 reg = <0 0x11270000 0 0x1000>; 96 reg-names = "mac"; 97 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; 98 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 99 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>; 100 clock-names = "sys_ck", "ref_ck"; 101 vusb33-supply = <&mt6397_vusb_reg>; 102 usb3-lpm-capable; 103 };