Based on kernel version 3.15.4. Page generated on 2014-07-07 09:04 EST.
1 Audio Clocking 2 ============== 3 4 This text describes the audio clocking terms in ASoC and digital audio in 5 general. Note: Audio clocking can be complex! 6 7 8 Master Clock 9 ------------ 10 11 Every audio subsystem is driven by a master clock (sometimes referred to as MCLK 12 or SYSCLK). This audio master clock can be derived from a number of sources 13 (e.g. crystal, PLL, CPU clock) and is responsible for producing the correct 14 audio playback and capture sample rates. 15 16 Some master clocks (e.g. PLLs and CPU based clocks) are configurable in that 17 their speed can be altered by software (depending on the system use and to save 18 power). Other master clocks are fixed at a set frequency (i.e. crystals). 19 20 21 DAI Clocks 22 ---------- 23 The Digital Audio Interface is usually driven by a Bit Clock (often referred to 24 as BCLK). This clock is used to drive the digital audio data across the link 25 between the codec and CPU. 26 27 The DAI also has a frame clock to signal the start of each audio frame. This 28 clock is sometimes referred to as LRC (left right clock) or FRAME. This clock 29 runs at exactly the sample rate (LRC = Rate). 30 31 Bit Clock can be generated as follows:- 32 33 BCLK = MCLK / x 34 35 or 36 37 BCLK = LRC * x 38 39 or 40 41 BCLK = LRC * Channels * Word Size 42 43 This relationship depends on the codec or SoC CPU in particular. In general 44 it is best to configure BCLK to the lowest possible speed (depending on your 45 rate, number of channels and word size) to save on power. 46 47 It is also desirable to use the codec (if possible) to drive (or master) the 48 audio clocks as it usually gives more accurate sample rates than the CPU. 49 50