Based on kernel version 5.10.1
. Page generated on 2020-12-14 21:14 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 | Microsemi Ocelot SoC ICPU Interrupt Controller Required properties: - compatible : should be "mscc,ocelot-icpu-intr" - reg : Specifies base physical address and size of the registers. - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : Specifies the number of cells needed to encode an interrupt source. The value shall be 1. - interrupts : Specifies the CPU interrupt the controller is connected to. Example: intc: interrupt-controller@70000070 { compatible = "mscc,ocelot-icpu-intr"; reg = <0x70000070 0x70>; #interrupt-cells = <1>; interrupt-controller; interrupt-parent = <&cpuintc>; interrupts = <2>; }; |