Documentation / devicetree / bindings / spi / spi-zynq-qspi.txt


Based on kernel version 5.11. Page generated on 2021-02-15 21:59 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Xilinx Zynq QSPI controller Device Tree Bindings
-------------------------------------------------------------------

Required properties:
- compatible		: Should be "xlnx,zynq-qspi-1.0".
- reg			: Physical base address and size of QSPI registers map.
- interrupts		: Property with a value describing the interrupt
			  number.
- clock-names		: List of input clock names - "ref_clk", "pclk"
			  (See clock bindings for details).
- clocks		: Clock phandles (see clock bindings for details).

Optional properties:
- num-cs		: Number of chip selects used.

Example:
	qspi: spi@e000d000 {
		compatible = "xlnx,zynq-qspi-1.0";
		reg = <0xe000d000 0x1000>;
		interrupt-parent = <&intc>;
		interrupts = <0 19 4>;
		clock-names = "ref_clk", "pclk";
		clocks = <&clkc 10>, <&clkc 43>;
		num-cs = <1>;
	};