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Based on kernel version 3.16. Page generated on 2014-08-06 21:39 EST.

1	<?xml version="1.0" encoding="UTF-8"?>
2	<!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
3		"http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
4	
5	<book id="MTD-NAND-Guide">
6	 <bookinfo>
7	  <title>MTD NAND Driver Programming Interface</title>
8	  
9	  <authorgroup>
10	   <author>
11	    <firstname>Thomas</firstname>
12	    <surname>Gleixner</surname>
13	    <affiliation>
14	     <address>
15	      <email>tglx@linutronix.de</email>
16	     </address>
17	    </affiliation>
18	   </author>
19	  </authorgroup>
20	
21	  <copyright>
22	   <year>2004</year>
23	   <holder>Thomas Gleixner</holder>
24	  </copyright>
25	
26	  <legalnotice>
27	   <para>
28	     This documentation is free software; you can redistribute
29	     it and/or modify it under the terms of the GNU General Public
30	     License version 2 as published by the Free Software Foundation.
31	   </para>
32	      
33	   <para>
34	     This program is distributed in the hope that it will be
35	     useful, but WITHOUT ANY WARRANTY; without even the implied
36	     warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
37	     See the GNU General Public License for more details.
38	   </para>
39	      
40	   <para>
41	     You should have received a copy of the GNU General Public
42	     License along with this program; if not, write to the Free
43	     Software Foundation, Inc., 59 Temple Place, Suite 330, Boston,
44	     MA 02111-1307 USA
45	   </para>
46	      
47	   <para>
48	     For more details see the file COPYING in the source
49	     distribution of Linux.
50	   </para>
51	  </legalnotice>
52	 </bookinfo>
53	
54	<toc></toc>
55	
56	  <chapter id="intro">
57	      <title>Introduction</title>
58	  <para>
59	  	The generic NAND driver supports almost all NAND and AG-AND based
60		chips and connects them to the Memory Technology Devices (MTD)
61		subsystem of the Linux Kernel.
62	  </para>
63	  <para>
64	  	This documentation is provided for developers who want to implement
65		board drivers or filesystem drivers suitable for NAND devices.
66	  </para>
67	  </chapter>
68	  
69	  <chapter id="bugs">
70	     <title>Known Bugs And Assumptions</title>
71	  <para>
72		None.	
73	  </para>
74	  </chapter>
75	
76	  <chapter id="dochints">
77	     <title>Documentation hints</title>
78	     <para>
79	     The function and structure docs are autogenerated. Each function and 
80	     struct member has a short description which is marked with an [XXX] identifier.
81	     The following chapters explain the meaning of those identifiers.
82	     </para>
83	     <sect1 id="Function_identifiers_XXX">
84		<title>Function identifiers [XXX]</title>
85	     	<para>
86		The functions are marked with [XXX] identifiers in the short
87		comment. The identifiers explain the usage and scope of the
88		functions. Following identifiers are used:
89	     	</para>
90		<itemizedlist>
91			<listitem><para>
92		  	[MTD Interface]</para><para>
93			These functions provide the interface to the MTD kernel API. 
94			They are not replaceable and provide functionality
95			which is complete hardware independent.
96			</para></listitem>
97			<listitem><para>
98		  	[NAND Interface]</para><para>
99			These functions are exported and provide the interface to the NAND kernel API. 
100			</para></listitem>
101			<listitem><para>
102		  	[GENERIC]</para><para>
103			Generic functions are not replaceable and provide functionality
104			which is complete hardware independent.
105			</para></listitem>
106			<listitem><para>
107		  	[DEFAULT]</para><para>
108			Default functions provide hardware related functionality which is suitable
109			for most of the implementations. These functions can be replaced by the
110			board driver if necessary. Those functions are called via pointers in the
111			NAND chip description structure. The board driver can set the functions which
112			should be replaced by board dependent functions before calling nand_scan().
113			If the function pointer is NULL on entry to nand_scan() then the pointer
114			is set to the default function which is suitable for the detected chip type.
115			</para></listitem>
116		</itemizedlist>
117	     </sect1>
118	     <sect1 id="Struct_member_identifiers_XXX">
119		<title>Struct member identifiers [XXX]</title>
120	     	<para>
121		The struct members are marked with [XXX] identifiers in the 
122		comment. The identifiers explain the usage and scope of the
123		members. Following identifiers are used:
124	     	</para>
125		<itemizedlist>
126			<listitem><para>
127		  	[INTERN]</para><para>
128			These members are for NAND driver internal use only and must not be
129			modified. Most of these values are calculated from the chip geometry
130			information which is evaluated during nand_scan().
131			</para></listitem>
132			<listitem><para>
133		  	[REPLACEABLE]</para><para>
134			Replaceable members hold hardware related functions which can be 
135			provided by the board driver. The board driver can set the functions which
136			should be replaced by board dependent functions before calling nand_scan().
137			If the function pointer is NULL on entry to nand_scan() then the pointer
138			is set to the default function which is suitable for the detected chip type.
139			</para></listitem>
140			<listitem><para>
141		  	[BOARDSPECIFIC]</para><para>
142			Board specific members hold hardware related information which must
143			be provided by the board driver. The board driver must set the function
144			pointers and datafields before calling nand_scan().
145			</para></listitem>
146			<listitem><para>
147		  	[OPTIONAL]</para><para>
148			Optional members can hold information relevant for the board driver. The
149			generic NAND driver code does not use this information.
150			</para></listitem>
151		</itemizedlist>
152	     </sect1>
153	  </chapter>   
154	
155	  <chapter id="basicboarddriver">
156	     	<title>Basic board driver</title>
157		<para>
158			For most boards it will be sufficient to provide just the
159			basic functions and fill out some really board dependent
160			members in the nand chip description structure.
161		</para>
162		<sect1 id="Basic_defines">
163			<title>Basic defines</title>
164			<para>
165				At least you have to provide a mtd structure and
166				a storage for the ioremap'ed chip address.
167				You can allocate the mtd structure using kmalloc
168				or you can allocate it statically.
169				In case of static allocation you have to allocate
170				a nand_chip structure too.
171			</para>
172			<para>
173				Kmalloc based example
174			</para>
175			<programlisting>
176	static struct mtd_info *board_mtd;
177	static void __iomem *baseaddr;
178			</programlisting>
179			<para>
180				Static example
181			</para>
182			<programlisting>
183	static struct mtd_info board_mtd;
184	static struct nand_chip board_chip;
185	static void __iomem *baseaddr;
186			</programlisting>
187		</sect1>
188		<sect1 id="Partition_defines">
189			<title>Partition defines</title>
190			<para>
191				If you want to divide your device into partitions, then
192				define a partitioning scheme suitable to your board.
193			</para>
194			<programlisting>
195	#define NUM_PARTITIONS 2
196	static struct mtd_partition partition_info[] = {
197		{ .name = "Flash partition 1",
198		  .offset =  0,
199		  .size =    8 * 1024 * 1024 },
200		{ .name = "Flash partition 2",
201		  .offset =  MTDPART_OFS_NEXT,
202		  .size =    MTDPART_SIZ_FULL },
203	};
204			</programlisting>
205		</sect1>
206		<sect1 id="Hardware_control_functions">
207			<title>Hardware control function</title>
208			<para>
209				The hardware control function provides access to the 
210				control pins of the NAND chip(s). 
211				The access can be done by GPIO pins or by address lines.
212				If you use address lines, make sure that the timing
213				requirements are met.
214			</para>
215			<para>
216				<emphasis>GPIO based example</emphasis>
217			</para>
218			<programlisting>
219	static void board_hwcontrol(struct mtd_info *mtd, int cmd)
220	{
221		switch(cmd){
222			case NAND_CTL_SETCLE: /* Set CLE pin high */ break;
223			case NAND_CTL_CLRCLE: /* Set CLE pin low */ break;
224			case NAND_CTL_SETALE: /* Set ALE pin high */ break;
225			case NAND_CTL_CLRALE: /* Set ALE pin low */ break;
226			case NAND_CTL_SETNCE: /* Set nCE pin low */ break;
227			case NAND_CTL_CLRNCE: /* Set nCE pin high */ break;
228		}
229	}
230			</programlisting>
231			<para>
232				<emphasis>Address lines based example.</emphasis> It's assumed that the
233				nCE pin is driven by a chip select decoder.
234			</para>
235			<programlisting>
236	static void board_hwcontrol(struct mtd_info *mtd, int cmd)
237	{
238		struct nand_chip *this = (struct nand_chip *) mtd->priv;
239		switch(cmd){
240			case NAND_CTL_SETCLE: this->IO_ADDR_W |= CLE_ADRR_BIT;  break;
241			case NAND_CTL_CLRCLE: this->IO_ADDR_W &amp;= ~CLE_ADRR_BIT; break;
242			case NAND_CTL_SETALE: this->IO_ADDR_W |= ALE_ADRR_BIT;  break;
243			case NAND_CTL_CLRALE: this->IO_ADDR_W &amp;= ~ALE_ADRR_BIT; break;
244		}
245	}
246			</programlisting>
247		</sect1>
248		<sect1 id="Device_ready_function">
249			<title>Device ready function</title>
250			<para>
251				If the hardware interface has the ready busy pin of the NAND chip connected to a
252				GPIO or other accessible I/O pin, this function is used to read back the state of the
253				pin. The function has no arguments and should return 0, if the device is busy (R/B pin 
254				is low) and 1, if the device is ready (R/B pin is high).
255				If the hardware interface does not give access to the ready busy pin, then
256				the function must not be defined and the function pointer this->dev_ready is set to NULL.		
257			</para>
258		</sect1>
259		<sect1 id="Init_function">
260			<title>Init function</title>
261			<para>
262				The init function allocates memory and sets up all the board
263				specific parameters and function pointers. When everything
264				is set up nand_scan() is called. This function tries to
265				detect and identify then chip. If a chip is found all the
266				internal data fields are initialized accordingly.
267				The structure(s) have to be zeroed out first and then filled with the necessary
268				information about the device.
269			</para>
270			<programlisting>
271	static int __init board_init (void)
272	{
273		struct nand_chip *this;
274		int err = 0;
275	
276		/* Allocate memory for MTD device structure and private data */
277		board_mtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
278		if (!board_mtd) {
279			printk ("Unable to allocate NAND MTD device structure.\n");
280			err = -ENOMEM;
281			goto out;
282		}
283	
284		/* map physical address */
285		baseaddr = ioremap(CHIP_PHYSICAL_ADDRESS, 1024);
286		if (!baseaddr) {
287			printk("Ioremap to access NAND chip failed\n");
288			err = -EIO;
289			goto out_mtd;
290		}
291	
292		/* Get pointer to private data */
293		this = (struct nand_chip *) ();
294		/* Link the private data with the MTD structure */
295		board_mtd->priv = this;
296	
297		/* Set address of NAND IO lines */
298		this->IO_ADDR_R = baseaddr;
299		this->IO_ADDR_W = baseaddr;
300		/* Reference hardware control function */
301		this->hwcontrol = board_hwcontrol;
302		/* Set command delay time, see datasheet for correct value */
303		this->chip_delay = CHIP_DEPENDEND_COMMAND_DELAY;
304		/* Assign the device ready function, if available */
305		this->dev_ready = board_dev_ready;
306		this->eccmode = NAND_ECC_SOFT;
307	
308		/* Scan to find existence of the device */
309		if (nand_scan (board_mtd, 1)) {
310			err = -ENXIO;
311			goto out_ior;
312		}
313		
314		add_mtd_partitions(board_mtd, partition_info, NUM_PARTITIONS);
315		goto out;
316	
317	out_ior:
318		iounmap(baseaddr);
319	out_mtd:
320		kfree (board_mtd);
321	out:
322		return err;
323	}
324	module_init(board_init);
325			</programlisting>
326		</sect1>
327		<sect1 id="Exit_function">
328			<title>Exit function</title>
329			<para>
330				The exit function is only necessary if the driver is
331				compiled as a module. It releases all resources which
332				are held by the chip driver and unregisters the partitions
333				in the MTD layer.
334			</para>
335			<programlisting>
336	#ifdef MODULE
337	static void __exit board_cleanup (void)
338	{
339		/* Release resources, unregister device */
340		nand_release (board_mtd);
341	
342		/* unmap physical address */
343		iounmap(baseaddr);
344		
345		/* Free the MTD device structure */
346		kfree (board_mtd);
347	}
348	module_exit(board_cleanup);
349	#endif
350			</programlisting>
351		</sect1>
352	  </chapter>
353	
354	  <chapter id="boarddriversadvanced">
355	     	<title>Advanced board driver functions</title>
356		<para>
357			This chapter describes the advanced functionality of the NAND
358			driver. For a list of functions which can be overridden by the board
359			driver see the documentation of the nand_chip structure.
360		</para>
361		<sect1 id="Multiple_chip_control">
362			<title>Multiple chip control</title>
363			<para>
364				The nand driver can control chip arrays. Therefore the
365				board driver must provide an own select_chip function. This
366				function must (de)select the requested chip.
367				The function pointer in the nand_chip structure must
368				be set before calling nand_scan(). The maxchip parameter
369				of nand_scan() defines the maximum number of chips to
370				scan for. Make sure that the select_chip function can
371				handle the requested number of chips.
372			</para>
373			<para>
374				The nand driver concatenates the chips to one virtual
375				chip and provides this virtual chip to the MTD layer.
376			</para>
377			<para>
378				<emphasis>Note: The driver can only handle linear chip arrays
379				of equally sized chips. There is no support for
380				parallel arrays which extend the buswidth.</emphasis>
381			</para>
382			<para>
383				<emphasis>GPIO based example</emphasis>
384			</para>
385			<programlisting>
386	static void board_select_chip (struct mtd_info *mtd, int chip)
387	{
388		/* Deselect all chips, set all nCE pins high */
389		GPIO(BOARD_NAND_NCE) |= 0xff;	
390		if (chip >= 0)
391			GPIO(BOARD_NAND_NCE) &amp;= ~ (1 &lt;&lt; chip);
392	}
393			</programlisting>
394			<para>
395				<emphasis>Address lines based example.</emphasis>
396				Its assumed that the nCE pins are connected to an
397				address decoder.
398			</para>
399			<programlisting>
400	static void board_select_chip (struct mtd_info *mtd, int chip)
401	{
402		struct nand_chip *this = (struct nand_chip *) mtd->priv;
403		
404		/* Deselect all chips */
405		this->IO_ADDR_R &amp;= ~BOARD_NAND_ADDR_MASK;
406		this->IO_ADDR_W &amp;= ~BOARD_NAND_ADDR_MASK;
407		switch (chip) {
408		case 0:
409			this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0;
410			this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0;
411			break;
412		....	
413		case n:
414			this->IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn;
415			this->IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn;
416			break;
417		}	
418	}
419			</programlisting>
420		</sect1>
421		<sect1 id="Hardware_ECC_support">
422			<title>Hardware ECC support</title>
423			<sect2 id="Functions_and_constants">
424				<title>Functions and constants</title>
425				<para>
426					The nand driver supports three different types of
427					hardware ECC.
428					<itemizedlist>
429					<listitem><para>NAND_ECC_HW3_256</para><para>
430					Hardware ECC generator providing 3 bytes ECC per
431					256 byte.
432					</para>	</listitem>
433					<listitem><para>NAND_ECC_HW3_512</para><para>
434					Hardware ECC generator providing 3 bytes ECC per
435					512 byte.
436					</para>	</listitem>
437					<listitem><para>NAND_ECC_HW6_512</para><para>
438					Hardware ECC generator providing 6 bytes ECC per
439					512 byte.
440					</para>	</listitem>
441					<listitem><para>NAND_ECC_HW8_512</para><para>
442					Hardware ECC generator providing 6 bytes ECC per
443					512 byte.
444					</para>	</listitem>
445					</itemizedlist>
446					If your hardware generator has a different functionality
447					add it at the appropriate place in nand_base.c
448				</para>
449				<para>
450					The board driver must provide following functions:
451					<itemizedlist>
452					<listitem><para>enable_hwecc</para><para>
453					This function is called before reading / writing to
454					the chip. Reset or initialize the hardware generator
455					in this function. The function is called with an
456					argument which let you distinguish between read 
457					and write operations.
458					</para>	</listitem>
459					<listitem><para>calculate_ecc</para><para>
460					This function is called after read / write from / to
461					the chip. Transfer the ECC from the hardware to
462					the buffer. If the option NAND_HWECC_SYNDROME is set
463					then the function is only called on write. See below.
464					</para>	</listitem>
465					<listitem><para>correct_data</para><para>
466					In case of an ECC error this function is called for
467					error detection and correction. Return 1 respectively 2
468					in case the error can be corrected. If the error is
469					not correctable return -1. If your hardware generator
470					matches the default algorithm of the nand_ecc software
471					generator then use the correction function provided
472					by nand_ecc instead of implementing duplicated code.
473					</para>	</listitem>
474					</itemizedlist>
475				</para>
476			</sect2>
477			<sect2 id="Hardware_ECC_with_syndrome_calculation">
478			<title>Hardware ECC with syndrome calculation</title>
479				<para>
480					Many hardware ECC implementations provide Reed-Solomon
481					codes and calculate an error syndrome on read. The syndrome
482					must be converted to a standard Reed-Solomon syndrome
483					before calling the error correction code in the generic
484					Reed-Solomon library.
485				</para>
486				<para>
487					The ECC bytes must be placed immediately after the data
488					bytes in order to make the syndrome generator work. This
489					is contrary to the usual layout used by software ECC. The
490					separation of data and out of band area is not longer
491					possible. The nand driver code handles this layout and
492					the remaining free bytes in the oob area are managed by 
493					the autoplacement code. Provide a matching oob-layout
494					in this case. See rts_from4.c and diskonchip.c for 
495					implementation reference. In those cases we must also
496					use bad block tables on FLASH, because the ECC layout is
497					interfering with the bad block marker positions.
498					See bad block table support for details.
499				</para>
500			</sect2>
501		</sect1>
502		<sect1 id="Bad_Block_table_support">
503			<title>Bad block table support</title>
504			<para>
505				Most NAND chips mark the bad blocks at a defined
506				position in the spare area. Those blocks must 
507				not be erased under any circumstances as the bad 
508				block information would be lost.
509				It is possible to check the bad block mark each
510				time when the blocks are accessed by reading the
511				spare area of the first page in the block. This
512				is time consuming so a bad block table is used.
513			</para>
514			<para>
515				The nand driver supports various types of bad block
516				tables.
517				<itemizedlist>
518				<listitem><para>Per device</para><para>
519				The bad block table contains all bad block information
520				of the device which can consist of multiple chips.
521				</para>	</listitem>
522				<listitem><para>Per chip</para><para>
523				A bad block table is used per chip and contains the
524				bad block information for this particular chip.
525				</para>	</listitem>
526				<listitem><para>Fixed offset</para><para>
527				The bad block table is located at a fixed offset
528				in the chip (device). This applies to various
529				DiskOnChip devices.
530				</para>	</listitem>
531				<listitem><para>Automatic placed</para><para>
532				The bad block table is automatically placed and
533				detected either at the end or at the beginning
534				of a chip (device)
535				</para>	</listitem>
536				<listitem><para>Mirrored tables</para><para>
537				The bad block table is mirrored on the chip (device) to
538				allow updates of the bad block table without data loss.
539				</para>	</listitem>
540				</itemizedlist>
541			</para>
542			<para>	
543				nand_scan() calls the function nand_default_bbt(). 
544				nand_default_bbt() selects appropriate default
545				bad block table descriptors depending on the chip information
546				which was retrieved by nand_scan().
547			</para>
548			<para>
549				The standard policy is scanning the device for bad 
550				blocks and build a ram based bad block table which
551				allows faster access than always checking the
552				bad block information on the flash chip itself.
553			</para>
554			<sect2 id="Flash_based_tables">
555				<title>Flash based tables</title>
556				<para>
557					It may be desired or necessary to keep a bad block table in FLASH.
558					For AG-AND chips this is mandatory, as they have no factory marked
559					bad blocks. They have factory marked good blocks. The marker pattern
560					is erased when the block is erased to be reused. So in case of
561					powerloss before writing the pattern back to the chip this block 
562					would be lost and added to the bad blocks. Therefore we scan the 
563					chip(s) when we detect them the first time for good blocks and 
564					store this information in a bad block table before erasing any 
565					of the blocks.
566				</para>
567				<para>
568					The blocks in which the tables are stored are protected against
569					accidental access by marking them bad in the memory bad block
570					table. The bad block table management functions are allowed
571					to circumvent this protection.
572				</para>
573				<para>
574					The simplest way to activate the FLASH based bad block table support 
575					is to set the option NAND_BBT_USE_FLASH in the bbt_option field of
576					the nand chip structure before calling nand_scan(). For AG-AND
577					chips is this done by default.
578					This activates the default FLASH based bad block table functionality 
579					of the NAND driver. The default bad block table options are
580					<itemizedlist>
581					<listitem><para>Store bad block table per chip</para></listitem>
582					<listitem><para>Use 2 bits per block</para></listitem>
583					<listitem><para>Automatic placement at the end of the chip</para></listitem>
584					<listitem><para>Use mirrored tables with version numbers</para></listitem>
585					<listitem><para>Reserve 4 blocks at the end of the chip</para></listitem>
586					</itemizedlist>
587				</para>
588			</sect2>
589			<sect2 id="User_defined_tables">
590				<title>User defined tables</title>
591				<para>
592					User defined tables are created by filling out a 
593					nand_bbt_descr structure and storing the pointer in the
594					nand_chip structure member bbt_td before calling nand_scan(). 
595					If a mirror table is necessary a second structure must be
596					created and a pointer to this structure must be stored
597					in bbt_md inside the nand_chip structure. If the bbt_md 
598					member is set to NULL then only the main table is used
599					and no scan for the mirrored table is performed.
600				</para>
601				<para>
602					The most important field in the nand_bbt_descr structure
603					is the options field. The options define most of the 
604					table properties. Use the predefined constants from
605					nand.h to define the options.
606					<itemizedlist>
607					<listitem><para>Number of bits per block</para>
608					<para>The supported number of bits is 1, 2, 4, 8.</para></listitem>
609					<listitem><para>Table per chip</para>
610					<para>Setting the constant NAND_BBT_PERCHIP selects that
611					a bad block table is managed for each chip in a chip array.
612					If this option is not set then a per device bad block table
613					is used.</para></listitem>
614					<listitem><para>Table location is absolute</para>
615					<para>Use the option constant NAND_BBT_ABSPAGE and
616					define the absolute page number where the bad block
617					table starts in the field pages. If you have selected bad block
618					tables per chip and you have a multi chip array then the start page
619					must be given for each chip in the chip array. Note: there is no scan
620					for a table ident pattern performed, so the fields 
621					pattern, veroffs, offs, len can be left uninitialized</para></listitem>
622					<listitem><para>Table location is automatically detected</para>
623					<para>The table can either be located in the first or the last good
624					blocks of the chip (device). Set NAND_BBT_LASTBLOCK to place
625					the bad block table at the end of the chip (device). The
626					bad block tables are marked and identified by a pattern which
627					is stored in the spare area of the first page in the block which
628					holds the bad block table. Store a pointer to the pattern  
629					in the pattern field. Further the length of the pattern has to be 
630					stored in len and the offset in the spare area must be given
631					in the offs member of the nand_bbt_descr structure. For mirrored
632					bad block tables different patterns are mandatory.</para></listitem>
633					<listitem><para>Table creation</para>
634					<para>Set the option NAND_BBT_CREATE to enable the table creation
635					if no table can be found during the scan. Usually this is done only 
636					once if a new chip is found. </para></listitem>
637					<listitem><para>Table write support</para>
638					<para>Set the option NAND_BBT_WRITE to enable the table write support.
639					This allows the update of the bad block table(s) in case a block has
640					to be marked bad due to wear. The MTD interface function block_markbad
641					is calling the update function of the bad block table. If the write
642					support is enabled then the table is updated on FLASH.</para>
643					<para>
644					Note: Write support should only be enabled for mirrored tables with
645					version control.
646					</para></listitem>
647					<listitem><para>Table version control</para>
648					<para>Set the option NAND_BBT_VERSION to enable the table version control.
649					It's highly recommended to enable this for mirrored tables with write
650					support. It makes sure that the risk of losing the bad block
651					table information is reduced to the loss of the information about the
652					one worn out block which should be marked bad. The version is stored in
653					4 consecutive bytes in the spare area of the device. The position of
654					the version number is defined by the member veroffs in the bad block table
655					descriptor.</para></listitem>
656					<listitem><para>Save block contents on write</para>
657					<para>
658					In case that the block which holds the bad block table does contain
659					other useful information, set the option NAND_BBT_SAVECONTENT. When
660					the bad block table is written then the whole block is read the bad
661					block table is updated and the block is erased and everything is 
662					written back. If this option is not set only the bad block table
663					is written and everything else in the block is ignored and erased.
664					</para></listitem>
665					<listitem><para>Number of reserved blocks</para>
666					<para>
667					For automatic placement some blocks must be reserved for
668					bad block table storage. The number of reserved blocks is defined 
669					in the maxblocks member of the bad block table description structure.
670					Reserving 4 blocks for mirrored tables should be a reasonable number. 
671					This also limits the number of blocks which are scanned for the bad
672					block table ident pattern.
673					</para></listitem>
674					</itemizedlist>
675				</para>
676			</sect2>
677		</sect1>
678		<sect1 id="Spare_area_placement">
679			<title>Spare area (auto)placement</title>
680			<para>
681				The nand driver implements different possibilities for
682				placement of filesystem data in the spare area, 
683				<itemizedlist>
684				<listitem><para>Placement defined by fs driver</para></listitem>
685				<listitem><para>Automatic placement</para></listitem>
686				</itemizedlist>
687				The default placement function is automatic placement. The
688				nand driver has built in default placement schemes for the
689				various chiptypes. If due to hardware ECC functionality the
690				default placement does not fit then the board driver can
691				provide a own placement scheme.
692			</para>
693			<para>
694				File system drivers can provide a own placement scheme which
695				is used instead of the default placement scheme.
696			</para>
697			<para>
698				Placement schemes are defined by a nand_oobinfo structure
699		     		<programlisting>
700	struct nand_oobinfo {
701		int	useecc;
702		int	eccbytes;
703		int	eccpos[24];
704		int	oobfree[8][2];
705	};
706		     		</programlisting>
707				<itemizedlist>
708				<listitem><para>useecc</para><para>
709					The useecc member controls the ecc and placement function. The header
710					file include/mtd/mtd-abi.h contains constants to select ecc and
711					placement. MTD_NANDECC_OFF switches off the ecc complete. This is
712					not recommended and available for testing and diagnosis only.
713					MTD_NANDECC_PLACE selects caller defined placement, MTD_NANDECC_AUTOPLACE
714					selects automatic placement.
715				</para></listitem>
716				<listitem><para>eccbytes</para><para>
717					The eccbytes member defines the number of ecc bytes per page.
718				</para></listitem>
719				<listitem><para>eccpos</para><para>
720					The eccpos array holds the byte offsets in the spare area where
721					the ecc codes are placed.
722				</para></listitem>
723				<listitem><para>oobfree</para><para>
724					The oobfree array defines the areas in the spare area which can be
725					used for automatic placement. The information is given in the format
726					{offset, size}. offset defines the start of the usable area, size the
727					length in bytes. More than one area can be defined. The list is terminated
728					by an {0, 0} entry.
729				</para></listitem>
730				</itemizedlist>
731			</para>
732			<sect2 id="Placement_defined_by_fs_driver">
733				<title>Placement defined by fs driver</title>
734				<para>
735					The calling function provides a pointer to a nand_oobinfo
736					structure which defines the ecc placement. For writes the
737					caller must provide a spare area buffer along with the
738					data buffer. The spare area buffer size is (number of pages) *
739					(size of spare area). For reads the buffer size is
740					(number of pages) * ((size of spare area) + (number of ecc
741					steps per page) * sizeof (int)). The driver stores the
742					result of the ecc check for each tuple in the spare buffer.
743					The storage sequence is 
744				</para>
745				<para>
746					&lt;spare data page 0&gt;&lt;ecc result 0&gt;...&lt;ecc result n&gt;
747				</para>
748				<para>
749					...
750				</para>
751				<para>
752					&lt;spare data page n&gt;&lt;ecc result 0&gt;...&lt;ecc result n&gt;
753				</para>
754				<para>
755					This is a legacy mode used by YAFFS1.
756				</para>
757				<para>
758					If the spare area buffer is NULL then only the ECC placement is
759					done according to the given scheme in the nand_oobinfo structure.
760				</para>
761			</sect2>
762			<sect2 id="Automatic_placement">
763				<title>Automatic placement</title>
764				<para>
765					Automatic placement uses the built in defaults to place the
766					ecc bytes in the spare area. If filesystem data have to be stored /
767					read into the spare area then the calling function must provide a
768					buffer. The buffer size per page is determined by the oobfree array in
769					the nand_oobinfo structure.
770				</para>
771				<para>
772					If the spare area buffer is NULL then only the ECC placement is
773					done according to the default builtin scheme.
774				</para>
775			</sect2>
776		</sect1>	
777		<sect1 id="Spare_area_autoplacement_default">
778			<title>Spare area autoplacement default schemes</title>
779			<sect2 id="pagesize_256">
780				<title>256 byte pagesize</title>
781	<informaltable><tgroup cols="3"><tbody>
782	<row>
783	<entry>Offset</entry>
784	<entry>Content</entry>
785	<entry>Comment</entry>
786	</row>
787	<row>
788	<entry>0x00</entry>
789	<entry>ECC byte 0</entry>
790	<entry>Error correction code byte 0</entry>
791	</row>
792	<row>
793	<entry>0x01</entry>
794	<entry>ECC byte 1</entry>
795	<entry>Error correction code byte 1</entry>
796	</row>
797	<row>
798	<entry>0x02</entry>
799	<entry>ECC byte 2</entry>
800	<entry>Error correction code byte 2</entry>
801	</row>
802	<row>
803	<entry>0x03</entry>
804	<entry>Autoplace 0</entry>
805	<entry></entry>
806	</row>
807	<row>
808	<entry>0x04</entry>
809	<entry>Autoplace 1</entry>
810	<entry></entry>
811	</row>
812	<row>
813	<entry>0x05</entry>
814	<entry>Bad block marker</entry>
815	<entry>If any bit in this byte is zero, then this block is bad.
816	This applies only to the first page in a block. In the remaining
817	pages this byte is reserved</entry>
818	</row>
819	<row>
820	<entry>0x06</entry>
821	<entry>Autoplace 2</entry>
822	<entry></entry>
823	</row>
824	<row>
825	<entry>0x07</entry>
826	<entry>Autoplace 3</entry>
827	<entry></entry>
828	</row>
829	</tbody></tgroup></informaltable>
830			</sect2>
831			<sect2 id="pagesize_512">
832				<title>512 byte pagesize</title>
833	<informaltable><tgroup cols="3"><tbody>
834	<row>
835	<entry>Offset</entry>
836	<entry>Content</entry>
837	<entry>Comment</entry>
838	</row>
839	<row>
840	<entry>0x00</entry>
841	<entry>ECC byte 0</entry>
842	<entry>Error correction code byte 0 of the lower 256 Byte data in
843	this page</entry>
844	</row>
845	<row>
846	<entry>0x01</entry>
847	<entry>ECC byte 1</entry>
848	<entry>Error correction code byte 1 of the lower 256 Bytes of data
849	in this page</entry>
850	</row>
851	<row>
852	<entry>0x02</entry>
853	<entry>ECC byte 2</entry>
854	<entry>Error correction code byte 2 of the lower 256 Bytes of data
855	in this page</entry>
856	</row>
857	<row>
858	<entry>0x03</entry>
859	<entry>ECC byte 3</entry>
860	<entry>Error correction code byte 0 of the upper 256 Bytes of data
861	in this page</entry>
862	</row>
863	<row>
864	<entry>0x04</entry>
865	<entry>reserved</entry>
866	<entry>reserved</entry>
867	</row>
868	<row>
869	<entry>0x05</entry>
870	<entry>Bad block marker</entry>
871	<entry>If any bit in this byte is zero, then this block is bad.
872	This applies only to the first page in a block. In the remaining
873	pages this byte is reserved</entry>
874	</row>
875	<row>
876	<entry>0x06</entry>
877	<entry>ECC byte 4</entry>
878	<entry>Error correction code byte 1 of the upper 256 Bytes of data
879	in this page</entry>
880	</row>
881	<row>
882	<entry>0x07</entry>
883	<entry>ECC byte 5</entry>
884	<entry>Error correction code byte 2 of the upper 256 Bytes of data
885	in this page</entry>
886	</row>
887	<row>
888	<entry>0x08 - 0x0F</entry>
889	<entry>Autoplace 0 - 7</entry>
890	<entry></entry>
891	</row>
892	</tbody></tgroup></informaltable>
893			</sect2>
894			<sect2 id="pagesize_2048">
895				<title>2048 byte pagesize</title>
896	<informaltable><tgroup cols="3"><tbody>
897	<row>
898	<entry>Offset</entry>
899	<entry>Content</entry>
900	<entry>Comment</entry>
901	</row>
902	<row>
903	<entry>0x00</entry>
904	<entry>Bad block marker</entry>
905	<entry>If any bit in this byte is zero, then this block is bad.
906	This applies only to the first page in a block. In the remaining
907	pages this byte is reserved</entry>
908	</row>
909	<row>
910	<entry>0x01</entry>
911	<entry>Reserved</entry>
912	<entry>Reserved</entry>
913	</row>
914	<row>
915	<entry>0x02-0x27</entry>
916	<entry>Autoplace 0 - 37</entry>
917	<entry></entry>
918	</row>
919	<row>
920	<entry>0x28</entry>
921	<entry>ECC byte 0</entry>
922	<entry>Error correction code byte 0 of the first 256 Byte data in
923	this page</entry>
924	</row>
925	<row>
926	<entry>0x29</entry>
927	<entry>ECC byte 1</entry>
928	<entry>Error correction code byte 1 of the first 256 Bytes of data
929	in this page</entry>
930	</row>
931	<row>
932	<entry>0x2A</entry>
933	<entry>ECC byte 2</entry>
934	<entry>Error correction code byte 2 of the first 256 Bytes data in
935	this page</entry>
936	</row>
937	<row>
938	<entry>0x2B</entry>
939	<entry>ECC byte 3</entry>
940	<entry>Error correction code byte 0 of the second 256 Bytes of data
941	in this page</entry>
942	</row>
943	<row>
944	<entry>0x2C</entry>
945	<entry>ECC byte 4</entry>
946	<entry>Error correction code byte 1 of the second 256 Bytes of data
947	in this page</entry>
948	</row>
949	<row>
950	<entry>0x2D</entry>
951	<entry>ECC byte 5</entry>
952	<entry>Error correction code byte 2 of the second 256 Bytes of data
953	in this page</entry>
954	</row>
955	<row>
956	<entry>0x2E</entry>
957	<entry>ECC byte 6</entry>
958	<entry>Error correction code byte 0 of the third 256 Bytes of data
959	in this page</entry>
960	</row>
961	<row>
962	<entry>0x2F</entry>
963	<entry>ECC byte 7</entry>
964	<entry>Error correction code byte 1 of the third 256 Bytes of data
965	in this page</entry>
966	</row>
967	<row>
968	<entry>0x30</entry>
969	<entry>ECC byte 8</entry>
970	<entry>Error correction code byte 2 of the third 256 Bytes of data
971	in this page</entry>
972	</row>
973	<row>
974	<entry>0x31</entry>
975	<entry>ECC byte 9</entry>
976	<entry>Error correction code byte 0 of the fourth 256 Bytes of data
977	in this page</entry>
978	</row>
979	<row>
980	<entry>0x32</entry>
981	<entry>ECC byte 10</entry>
982	<entry>Error correction code byte 1 of the fourth 256 Bytes of data
983	in this page</entry>
984	</row>
985	<row>
986	<entry>0x33</entry>
987	<entry>ECC byte 11</entry>
988	<entry>Error correction code byte 2 of the fourth 256 Bytes of data
989	in this page</entry>
990	</row>
991	<row>
992	<entry>0x34</entry>
993	<entry>ECC byte 12</entry>
994	<entry>Error correction code byte 0 of the fifth 256 Bytes of data
995	in this page</entry>
996	</row>
997	<row>
998	<entry>0x35</entry>
999	<entry>ECC byte 13</entry>
1000	<entry>Error correction code byte 1 of the fifth 256 Bytes of data
1001	in this page</entry>
1002	</row>
1003	<row>
1004	<entry>0x36</entry>
1005	<entry>ECC byte 14</entry>
1006	<entry>Error correction code byte 2 of the fifth 256 Bytes of data
1007	in this page</entry>
1008	</row>
1009	<row>
1010	<entry>0x37</entry>
1011	<entry>ECC byte 15</entry>
1012	<entry>Error correction code byte 0 of the sixt 256 Bytes of data
1013	in this page</entry>
1014	</row>
1015	<row>
1016	<entry>0x38</entry>
1017	<entry>ECC byte 16</entry>
1018	<entry>Error correction code byte 1 of the sixt 256 Bytes of data
1019	in this page</entry>
1020	</row>
1021	<row>
1022	<entry>0x39</entry>
1023	<entry>ECC byte 17</entry>
1024	<entry>Error correction code byte 2 of the sixt 256 Bytes of data
1025	in this page</entry>
1026	</row>
1027	<row>
1028	<entry>0x3A</entry>
1029	<entry>ECC byte 18</entry>
1030	<entry>Error correction code byte 0 of the seventh 256 Bytes of
1031	data in this page</entry>
1032	</row>
1033	<row>
1034	<entry>0x3B</entry>
1035	<entry>ECC byte 19</entry>
1036	<entry>Error correction code byte 1 of the seventh 256 Bytes of
1037	data in this page</entry>
1038	</row>
1039	<row>
1040	<entry>0x3C</entry>
1041	<entry>ECC byte 20</entry>
1042	<entry>Error correction code byte 2 of the seventh 256 Bytes of
1043	data in this page</entry>
1044	</row>
1045	<row>
1046	<entry>0x3D</entry>
1047	<entry>ECC byte 21</entry>
1048	<entry>Error correction code byte 0 of the eighth 256 Bytes of data
1049	in this page</entry>
1050	</row>
1051	<row>
1052	<entry>0x3E</entry>
1053	<entry>ECC byte 22</entry>
1054	<entry>Error correction code byte 1 of the eighth 256 Bytes of data
1055	in this page</entry>
1056	</row>
1057	<row>
1058	<entry>0x3F</entry>
1059	<entry>ECC byte 23</entry>
1060	<entry>Error correction code byte 2 of the eighth 256 Bytes of data
1061	in this page</entry>
1062	</row>
1063	</tbody></tgroup></informaltable>
1064			</sect2>
1065	     	</sect1>
1066	  </chapter>
1067	
1068	  <chapter id="filesystems">
1069	     	<title>Filesystem support</title>
1070		<para>
1071			The NAND driver provides all necessary functions for a
1072			filesystem via the MTD interface.
1073		</para>
1074		<para>
1075			Filesystems must be aware of the NAND peculiarities and
1076			restrictions. One major restrictions of NAND Flash is, that you cannot 
1077			write as often as you want to a page. The consecutive writes to a page, 
1078			before erasing it again, are restricted to 1-3 writes, depending on the 
1079			manufacturers specifications. This applies similar to the spare area. 
1080		</para>
1081		<para>
1082			Therefore NAND aware filesystems must either write in page size chunks
1083			or hold a writebuffer to collect smaller writes until they sum up to 
1084			pagesize. Available NAND aware filesystems: JFFS2, YAFFS. 		
1085		</para>
1086		<para>
1087			The spare area usage to store filesystem data is controlled by
1088			the spare area placement functionality which is described in one
1089			of the earlier chapters.
1090		</para>
1091	  </chapter>	
1092	  <chapter id="tools">
1093	     	<title>Tools</title>
1094		<para>
1095			The MTD project provides a couple of helpful tools to handle NAND Flash.
1096			<itemizedlist>
1097			<listitem><para>flasherase, flasheraseall: Erase and format FLASH partitions</para></listitem>
1098			<listitem><para>nandwrite: write filesystem images to NAND FLASH</para></listitem>
1099			<listitem><para>nanddump: dump the contents of a NAND FLASH partitions</para></listitem>
1100			</itemizedlist>
1101		</para>
1102		<para>
1103			These tools are aware of the NAND restrictions. Please use those tools
1104			instead of complaining about errors which are caused by non NAND aware
1105			access methods.
1106		</para>
1107	  </chapter>	
1108	
1109	  <chapter id="defines">
1110	     <title>Constants</title>
1111	     <para>
1112	     This chapter describes the constants which might be relevant for a driver developer.
1113	     </para>
1114	     <sect1 id="Chip_option_constants">
1115		<title>Chip option constants</title>
1116	     	<sect2 id="Constants_for_chip_id_table">
1117			<title>Constants for chip id table</title>
1118	     		<para>
1119			These constants are defined in nand.h. They are ored together to describe
1120			the chip functionality.
1121	     		<programlisting>
1122	/* Buswitdh is 16 bit */
1123	#define NAND_BUSWIDTH_16	0x00000002
1124	/* Device supports partial programming without padding */
1125	#define NAND_NO_PADDING		0x00000004
1126	/* Chip has cache program function */
1127	#define NAND_CACHEPRG		0x00000008
1128	/* Chip has copy back function */
1129	#define NAND_COPYBACK		0x00000010
1130	/* AND Chip which has 4 banks and a confusing page / block 
1131	 * assignment. See Renesas datasheet for further information */
1132	#define NAND_IS_AND		0x00000020
1133	/* Chip has a array of 4 pages which can be read without
1134	 * additional ready /busy waits */
1135	#define NAND_4PAGE_ARRAY	0x00000040 
1136			</programlisting>
1137	     		</para>
1138	     	</sect2>
1139	     	<sect2 id="Constants_for_runtime_options">
1140			<title>Constants for runtime options</title>
1141	     		<para>
1142			These constants are defined in nand.h. They are ored together to describe
1143			the functionality.
1144	     		<programlisting>
1145	/* The hw ecc generator provides a syndrome instead a ecc value on read 
1146	 * This can only work if we have the ecc bytes directly behind the 
1147	 * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
1148	#define NAND_HWECC_SYNDROME	0x00020000
1149			</programlisting>
1150	     		</para>
1151	     	</sect2>
1152	     </sect1>	
1153	
1154	     <sect1 id="EEC_selection_constants">
1155		<title>ECC selection constants</title>
1156		<para>
1157		Use these constants to select the ECC algorithm.
1158	  	<programlisting>
1159	/* No ECC. Usage is not recommended ! */
1160	#define NAND_ECC_NONE		0
1161	/* Software ECC 3 byte ECC per 256 Byte data */
1162	#define NAND_ECC_SOFT		1
1163	/* Hardware ECC 3 byte ECC per 256 Byte data */
1164	#define NAND_ECC_HW3_256	2
1165	/* Hardware ECC 3 byte ECC per 512 Byte data */
1166	#define NAND_ECC_HW3_512	3
1167	/* Hardware ECC 6 byte ECC per 512 Byte data */
1168	#define NAND_ECC_HW6_512	4
1169	/* Hardware ECC 6 byte ECC per 512 Byte data */
1170	#define NAND_ECC_HW8_512	6
1171		</programlisting>
1172		</para>
1173	     </sect1>	
1174	
1175	     <sect1 id="Hardware_control_related_constants">
1176		<title>Hardware control related constants</title>
1177		<para>
1178		These constants describe the requested hardware access function when
1179		the boardspecific hardware control function is called
1180	  	<programlisting>
1181	/* Select the chip by setting nCE to low */
1182	#define NAND_CTL_SETNCE 	1
1183	/* Deselect the chip by setting nCE to high */
1184	#define NAND_CTL_CLRNCE		2
1185	/* Select the command latch by setting CLE to high */
1186	#define NAND_CTL_SETCLE		3
1187	/* Deselect the command latch by setting CLE to low */
1188	#define NAND_CTL_CLRCLE		4
1189	/* Select the address latch by setting ALE to high */
1190	#define NAND_CTL_SETALE		5
1191	/* Deselect the address latch by setting ALE to low */
1192	#define NAND_CTL_CLRALE		6
1193	/* Set write protection by setting WP to high. Not used! */
1194	#define NAND_CTL_SETWP		7
1195	/* Clear write protection by setting WP to low. Not used! */
1196	#define NAND_CTL_CLRWP		8
1197		</programlisting>
1198		</para>
1199	     </sect1>	
1200	
1201	     <sect1 id="Bad_block_table_constants">
1202		<title>Bad block table related constants</title>
1203		<para>
1204		These constants describe the options used for bad block
1205		table descriptors.
1206	  	<programlisting>
1207	/* Options for the bad block table descriptors */
1208	
1209	/* The number of bits used per block in the bbt on the device */
1210	#define NAND_BBT_NRBITS_MSK	0x0000000F
1211	#define NAND_BBT_1BIT		0x00000001
1212	#define NAND_BBT_2BIT		0x00000002
1213	#define NAND_BBT_4BIT		0x00000004
1214	#define NAND_BBT_8BIT		0x00000008
1215	/* The bad block table is in the last good block of the device */
1216	#define	NAND_BBT_LASTBLOCK	0x00000010
1217	/* The bbt is at the given page, else we must scan for the bbt */
1218	#define NAND_BBT_ABSPAGE	0x00000020
1219	/* bbt is stored per chip on multichip devices */
1220	#define NAND_BBT_PERCHIP	0x00000080
1221	/* bbt has a version counter at offset veroffs */
1222	#define NAND_BBT_VERSION	0x00000100
1223	/* Create a bbt if none axists */
1224	#define NAND_BBT_CREATE		0x00000200
1225	/* Write bbt if necessary */
1226	#define NAND_BBT_WRITE		0x00001000
1227	/* Read and write back block contents when writing bbt */
1228	#define NAND_BBT_SAVECONTENT	0x00002000
1229		</programlisting>
1230		</para>
1231	     </sect1>	
1232	
1233	  </chapter>
1234	  	
1235	  <chapter id="structs">
1236	     <title>Structures</title>
1237	     <para>
1238	     This chapter contains the autogenerated documentation of the structures which are
1239	     used in the NAND driver and might be relevant for a driver developer. Each  
1240	     struct member has a short description which is marked with an [XXX] identifier.
1241	     See the chapter "Documentation hints" for an explanation.
1242	     </para>
1243	!Iinclude/linux/mtd/nand.h
1244	  </chapter>
1245	
1246	  <chapter id="pubfunctions">
1247	     <title>Public Functions Provided</title>
1248	     <para>
1249	     This chapter contains the autogenerated documentation of the NAND kernel API functions
1250	      which are exported. Each function has a short description which is marked with an [XXX] identifier.
1251	     See the chapter "Documentation hints" for an explanation.
1252	     </para>
1253	!Edrivers/mtd/nand/nand_base.c
1254	!Edrivers/mtd/nand/nand_bbt.c
1255	!Edrivers/mtd/nand/nand_ecc.c
1256	  </chapter>
1257	  
1258	  <chapter id="intfunctions">
1259	     <title>Internal Functions Provided</title>
1260	     <para>
1261	     This chapter contains the autogenerated documentation of the NAND driver internal functions.
1262	     Each function has a short description which is marked with an [XXX] identifier.
1263	     See the chapter "Documentation hints" for an explanation.
1264	     The functions marked with [DEFAULT] might be relevant for a board driver developer.
1265	     </para>
1266	!Idrivers/mtd/nand/nand_base.c
1267	!Idrivers/mtd/nand/nand_bbt.c
1268	<!-- No internal functions for kernel-doc:
1269	X!Idrivers/mtd/nand/nand_ecc.c
1270	-->
1271	  </chapter>
1272	
1273	  <chapter id="credits">
1274	     <title>Credits</title>
1275		<para>
1276			The following people have contributed to the NAND driver:
1277			<orderedlist>
1278				<listitem><para>Steven J. Hill<email>sjhill@realitydiluted.com</email></para></listitem>
1279				<listitem><para>David Woodhouse<email>dwmw2@infradead.org</email></para></listitem>
1280				<listitem><para>Thomas Gleixner<email>tglx@linutronix.de</email></para></listitem>
1281			</orderedlist>
1282			A lot of users have provided bugfixes, improvements and helping hands for testing.
1283			Thanks a lot.
1284		</para>
1285		<para>
1286			The following people have contributed to this document:
1287			<orderedlist>
1288				<listitem><para>Thomas Gleixner<email>tglx@linutronix.de</email></para></listitem>
1289			</orderedlist>
1290		</para>
1291	  </chapter>
1292	</book>
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