Based on kernel version 4.13.3. Page generated on 2017-09-23 13:55 EST.
1 Microchip MCP2308/MCP23S08/MCP23017/MCP23S17 driver for 2 8-/16-bit I/O expander with serial interface (I2C/SPI) 3 4 Required properties: 5 - compatible : Should be 6 - "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version 7 - "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version 8 - "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or 9 - "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip 10 11 - "microchip,mcp23s08" for 8 GPIO SPI version 12 - "microchip,mcp23s17" for 16 GPIO SPI version 13 - "microchip,mcp23s18" for 16 GPIO SPI version 14 - "microchip,mcp23008" for 8 GPIO I2C version or 15 - "microchip,mcp23017" for 16 GPIO I2C version of the chip 16 NOTE: Do not use the old mcp prefix any more. It is deprecated and will be 17 removed. 18 - #gpio-cells : Should be two. 19 - first cell is the pin number 20 - second cell is used to specify flags. Flags are currently unused. 21 - gpio-controller : Marks the device node as a GPIO controller. 22 - reg : For an address on its bus. I2C uses this a the I2C address of the chip. 23 SPI uses this to specify the chipselect line which the chip is 24 connected to. The driver and the SPI variant of the chip support 25 multiple chips on the same chipselect. Have a look at 26 microchip,spi-present-mask below. 27 28 Required device specific properties (only for SPI chips): 29 - mcp,spi-present-mask (DEPRECATED) 30 - microchip,spi-present-mask : This is a present flag, that makes only sense for SPI 31 chips - as the name suggests. Multiple SPI chips can share the same 32 SPI chipselect. Set a bit in bit0-7 in this mask to 1 if there is a 33 chip connected with the corresponding spi address set. For example if 34 you have a chip with address 3 connected, you have to set bit3 to 1, 35 which is 0x08. mcp23s08 chip variant only supports bits 0-3. It is not 36 possible to mix mcp23s08 and mcp23s17 on the same chipselect. Set at 37 least one bit to 1 for SPI chips. 38 NOTE: Do not use the old mcp prefix any more. It is deprecated and will be 39 removed. 40 - spi-max-frequency = The maximum frequency this chip is able to handle 41 42 Optional properties: 43 - #interrupt-cells : Should be two. 44 - first cell is the pin number 45 - second cell is used to specify flags. 46 - interrupt-controller: Marks the device node as a interrupt controller. 47 48 Optional device specific properties: 49 - microchip,irq-mirror: Sets the mirror flag in the IOCON register. Devices 50 with two interrupt outputs (these are the devices ending with 17 and 51 those that have 16 IOs) have two IO banks: IO 0-7 form bank 1 and 52 IO 8-15 are bank 2. These chips have two different interrupt outputs: 53 One for bank 1 and another for bank 2. If irq-mirror is set, both 54 interrupts are generated regardless of the bank that an input change 55 occurred on. If it is not set, the interrupt are only generated for the 56 bank they belong to. 57 On devices with only one interrupt output this property is useless. 58 - microchip,irq-active-high: Sets the INTPOL flag in the IOCON register. This 59 configures the IRQ output polarity as active high. 60 61 Example I2C (with interrupt): 62 gpiom1: gpio@20 { 63 compatible = "microchip,mcp23017"; 64 gpio-controller; 65 #gpio-cells = <2>; 66 reg = <0x20>; 67 68 interrupt-parent = <&gpio1>; 69 interrupts = <17 IRQ_TYPE_LEVEL_LOW>; 70 interrupt-controller; 71 #interrupt-cells=<2>; 72 microchip,irq-mirror; 73 }; 74 75 Example SPI: 76 gpiom1: gpio@0 { 77 compatible = "microchip,mcp23s17"; 78 gpio-controller; 79 #gpio-cells = <2>; 80 spi-present-mask = <0x01>; 81 reg = <0>; 82 spi-max-frequency = <1000000>; 83 };