Based on kernel version 3.7. Page generated on 2012-12-12 10:00 EST.
1 Common i2c bus multiplexer/switch properties. 2 3 An i2c bus multiplexer/switch will have several child busses that are 4 numbered uniquely in a device dependent manner. The nodes for an i2c bus 5 multiplexer/switch will have one child node for each child 6 bus. 7 8 Required properties: 9 - #address-cells = <1>; 10 - #size-cells = <0>; 11 12 Required properties for child nodes: 13 - #address-cells = <1>; 14 - #size-cells = <0>; 15 - reg : The sub-bus number. 16 17 Optional properties for child nodes: 18 - Other properties specific to the multiplexer/switch hardware. 19 - Child nodes conforming to i2c bus binding 20 21 22 Example : 23 24 /* 25 An NXP pca9548 8 channel I2C multiplexer at address 0x70 26 with two NXP pca8574 GPIO expanders attached, one each to 27 ports 3 and 4. 28 */ 29 30 mux@70 { 31 compatible = "nxp,pca9548"; 32 reg = <0x70>; 33 #address-cells = <1>; 34 #size-cells = <0>; 35 36 i2c@3 { 37 #address-cells = <1>; 38 #size-cells = <0>; 39 reg = <3>; 40 41 gpio1: gpio@38 { 42 compatible = "nxp,pca8574"; 43 reg = <0x38>; 44 #gpio-cells = <2>; 45 gpio-controller; 46 }; 47 }; 48 i2c@4 { 49 #address-cells = <1>; 50 #size-cells = <0>; 51 reg = <4>; 52 53 gpio2: gpio@38 { 54 compatible = "nxp,pca8574"; 55 reg = <0x38>; 56 #gpio-cells = <2>; 57 gpio-controller; 58 }; 59 }; 60 };