Based on kernel version 6.2.16
. Page generated on 2023-08-29 08:28 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 | Qualcomm's USB HSIC PHY PROPERTIES - compatible: Usage: required Value type: <string> Definition: Should contain "qcom,usb-hsic-phy" and more specifically one of the following: "qcom,usb-hsic-phy-mdm9615" "qcom,usb-hsic-phy-msm8974" - #phy-cells: Usage: required Value type: <u32> Definition: Should contain 0 - clocks: Usage: required Value type: <prop-encoded-array> Definition: Should contain clock specifier for phy, calibration and a calibration sleep clock - clock-names: Usage: required Value type: <stringlist> Definition: Should contain "phy, "cal" and "cal_sleep" - pinctrl-names: Usage: required Value type: <stringlist> Definition: Should contain "init" and "default" in that order - pinctrl-0: Usage: required Value type: <prop-encoded-array> Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch free state - pinctrl-1: Usage: required Value type: <prop-encoded-array> Definition: List of pinctrl settings to apply to mux out the HSIC pins EXAMPLE usb-controller { ulpi { phy { compatible = "qcom,usb-hsic-phy-msm8974", "qcom,usb-hsic-phy"; #phy-cells = <0>; pinctrl-names = "init", "default"; pinctrl-0 = <&hsic_sleep>; pinctrl-1 = <&hsic_default>; clocks = <&gcc GCC_USB_HSIC_CLK>, <&gcc GCC_USB_HSIC_IO_CAL_CLK>, <&gcc GCC_USB_HSIC_IO_CAL_SLEEP_CLK>; clock-names = "phy", "cal", "cal_sleep"; assigned-clocks = <&gcc GCC_USB_HSIC_IO_CAL_CLK>; assigned-clock-rates = <960000>; }; }; }; |