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Documentation / devicetree / bindings / spi / spi-samsung.txt




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Based on kernel version 3.9. Page generated on 2013-05-02 23:02 EST.

1	* Samsung SPI Controller
2	
3	The Samsung SPI controller is used to interface with various devices such as flash
4	and display controllers using the SPI communication interface.
5	
6	Required SoC Specific Properties:
7	
8	- compatible: should be one of the following.
9	    - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
10	    - samsung,s3c6410-spi: for s3c6410 platforms
11	    - samsung,s5p6440-spi: for s5p6440 and s5p6450 platforms
12	    - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
13	    - samsung,exynos4210-spi: for exynos4 and exynos5 platforms
14	
15	- reg: physical base address of the controller and length of memory mapped
16	  region.
17	
18	- interrupts: The interrupt number to the cpu. The interrupt specifier format
19	  depends on the interrupt controller.
20	
21	[PRELIMINARY: the dma channel allocation will change once there are
22	official DMA bindings]
23	
24	- tx-dma-channel: The dma channel specifier for tx operations. The format of
25	  the dma specifier depends on the dma controller.
26	
27	- rx-dma-channel: The dma channel specifier for rx operations. The format of
28	  the dma specifier depends on the dma controller.
29	
30	Required Board Specific Properties:
31	
32	- #address-cells: should be 1.
33	- #size-cells: should be 0.
34	- gpios: The gpio specifier for clock, mosi and miso interface lines (in the
35	  order specified). The format of the gpio specifier depends on the gpio
36	  controller.
37	
38	Optional Board Specific Properties:
39	
40	- samsung,spi-src-clk: If the spi controller includes a internal clock mux to
41	  select the clock source for the spi bus clock, this property can be used to
42	  indicate the clock to be used for driving the spi bus clock. If not specified,
43	  the clock number 0 is used as default.
44	
45	- num-cs: Specifies the number of chip select lines supported. If
46	  not specified, the default number of chip select lines is set to 1.
47	
48	SPI Controller specific data in SPI slave nodes:
49	
50	- The spi slave nodes should provide the following information which is required
51	  by the spi controller.
52	
53	  - cs-gpio: A gpio specifier that specifies the gpio line used as
54	    the slave select line by the spi controller. The format of the gpio
55	    specifier depends on the gpio controller.
56	
57	  - samsung,spi-feedback-delay: The sampling phase shift to be applied on the
58	    miso line (to account for any lag in the miso line). The following are the
59	    valid values.
60	
61	      - 0: No phase shift.
62	      - 1: 90 degree phase shift sampling.
63	      - 2: 180 degree phase shift sampling.
64	      - 3: 270 degree phase shift sampling.
65	
66	Aliases:
67	
68	- All the SPI controller nodes should be represented in the aliases node using
69	  the following format 'spi{n}' where n is a unique number for the alias.
70	
71	
72	Example:
73	
74	- SoC Specific Portion:
75	
76		spi_0: spi@12d20000 {
77			compatible = "samsung,exynos4210-spi";
78			reg = <0x12d20000 0x100>;
79			interrupts = <0 66 0>;
80			tx-dma-channel = <&pdma0 5>;
81			rx-dma-channel = <&pdma0 4>;
82		};
83	
84	- Board Specific Portion:
85	
86		spi_0: spi@12d20000 {
87			#address-cells = <1>;
88			#size-cells = <0>;
89			gpios = <&gpa2 4 2 3 0>,
90				<&gpa2 6 2 3 0>,
91				<&gpa2 7 2 3 0>;
92	
93			w25q80bw@0 {
94				#address-cells = <1>;
95				#size-cells = <1>;
96				compatible = "w25x80";
97				reg = <0>;
98				spi-max-frequency = <10000>;
99	
100				controller-data {
101					cs-gpio = <&gpa2 5 1 0 3>;
102					samsung,spi-feedback-delay = <0>;
103				};
104	
105				partition@0 {
106					label = "U-Boot";
107					reg = <0x0 0x40000>;
108					read-only;
109				};
110	
111				partition@40000 {
112					label = "Kernel";
113					reg = <0x40000 0xc0000>;
114				};
115			};
116		};
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