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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 | Andestech ATCPIT100 timer ------------------------------------------------------------------ ATCPIT100 is a generic IP block from Andes Technology, embedded in Andestech AE3XX platforms and other designs. This timer is a set of compact multi-function timers, which can be used as pulse width modulators (PWM) as well as simple timers. It supports up to 4 PIT channels. Each PIT channel is a multi-function timer and provide the following usage scenarios: One 32-bit timer Two 16-bit timers Four 8-bit timers One 16-bit PWM One 16-bit timer and one 8-bit PWM Two 8-bit timer and one 8-bit PWM Required properties: - compatible : Should be "andestech,atcpit100" - reg : Address and length of the register set - interrupts : Reference to the timer interrupt - clocks : a clock to provide the tick rate for "andestech,atcpit100" - clock-names : should be "PCLK" for the peripheral clock source. Examples: timer0: timer@f0400000 { compatible = "andestech,atcpit100"; reg = <0xf0400000 0x1000>; interrupts = <2>; clocks = <&apb>; clock-names = "PCLK"; }; |