Based on kernel version 2.6.26. Page generated on 2008-07-16 21:12 EST.
1 The I2C protocol knows about two kinds of device addresses: normal 7 bit 2 addresses, and an extended set of 10 bit addresses. The sets of addresses 3 do not intersect: the 7 bit address 0x10 is not the same as the 10 bit 4 address 0x10 (though a single device could respond to both of them). You 5 select a 10 bit address by adding an extra byte after the address 6 byte: 7 S Addr7 Rd/Wr .... 8 becomes 9 S 11110 Addr10 Rd/Wr 10 S is the start bit, Rd/Wr the read/write bit, and if you count the number 11 of bits, you will see the there are 8 after the S bit for 7 bit addresses, 12 and 16 after the S bit for 10 bit addresses. 13 14 WARNING! The current 10 bit address support is EXPERIMENTAL. There are 15 several places in the code that will cause SEVERE PROBLEMS with 10 bit 16 addresses, even though there is some basic handling and hooks. Also, 17 almost no supported adapter handles the 10 bit addresses correctly. 18 19 As soon as a real 10 bit address device is spotted 'in the wild', we 20 can and will add proper support. Right now, 10 bit address devices 21 are defined by the I2C protocol, but we have never seen a single device 22 which supports them.