Based on kernel version 3.4. Page generated on 2012-05-21 22:08 EST.
1 STMicroelectronics 10/100/1000 Synopsys Ethernet driver 2 3 Copyright (C) 2007-2010 STMicroelectronics Ltd 4 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> 5 6 This is the driver for the MAC 10/100/1000 on-chip Ethernet controllers 7 (Synopsys IP blocks). 8 9 Currently this network device driver is for all STM embedded MAC/GMAC 10 (i.e. 7xxx/5xxx SoCs), SPEAr (arm), Loongson1B (mips) and XLINX XC2V3000 11 FF1152AMT0221 D1215994A VIRTEX FPGA board. 12 13 DWC Ether MAC 10/100/1000 Universal version 3.60a (and older) and DWC Ether MAC 10/100 14 Universal version 4.0 have been used for developing this driver. 15 16 This driver supports both the platform bus and PCI. 17 18 Please, for more information also visit: www.stlinux.com 19 20 1) Kernel Configuration 21 The kernel configuration option is STMMAC_ETH: 22 Device Drivers ---> Network device support ---> Ethernet (1000 Mbit) ---> 23 STMicroelectronics 10/100/1000 Ethernet driver (STMMAC_ETH) 24 25 2) Driver parameters list: 26 debug: message level (0: no output, 16: all); 27 phyaddr: to manually provide the physical address to the PHY device; 28 dma_rxsize: DMA rx ring size; 29 dma_txsize: DMA tx ring size; 30 buf_sz: DMA buffer size; 31 tc: control the HW FIFO threshold; 32 tx_coe: Enable/Disable Tx Checksum Offload engine; 33 watchdog: transmit timeout (in milliseconds); 34 flow_ctrl: Flow control ability [on/off]; 35 pause: Flow Control Pause Time; 36 tmrate: timer period (only if timer optimisation is configured). 37 38 3) Command line options 39 Driver parameters can be also passed in command line by using: 40 stmmaceth=dma_rxsize:128,dma_txsize:512 41 42 4) Driver information and notes 43 44 4.1) Transmit process 45 The xmit method is invoked when the kernel needs to transmit a packet; it sets 46 the descriptors in the ring and informs the DMA engine that there is a packet 47 ready to be transmitted. 48 Once the controller has finished transmitting the packet, an interrupt is 49 triggered; So the driver will be able to release the socket buffers. 50 By default, the driver sets the NETIF_F_SG bit in the features field of the 51 net_device structure enabling the scatter/gather feature. 52 53 4.2) Receive process 54 When one or more packets are received, an interrupt happens. The interrupts 55 are not queued so the driver has to scan all the descriptors in the ring during 56 the receive process. 57 This is based on NAPI so the interrupt handler signals only if there is work to be 58 done, and it exits. 59 Then the poll method will be scheduled at some future point. 60 The incoming packets are stored, by the DMA, in a list of pre-allocated socket 61 buffers in order to avoid the memcpy (Zero-copy). 62 63 4.3) Timer-Driver Interrupt 64 Instead of having the device that asynchronously notifies the frame receptions, the 65 driver configures a timer to generate an interrupt at regular intervals. 66 Based on the granularity of the timer, the frames that are received by the device 67 will experience different levels of latency. Some NICs have dedicated timer 68 device to perform this task. STMMAC can use either the RTC device or the TMU 69 channel 2 on STLinux platforms. 70 The timers frequency can be passed to the driver as parameter; when change it, 71 take care of both hardware capability and network stability/performance impact. 72 Several performance tests on STM platforms showed this optimisation allows to spare 73 the CPU while having the maximum throughput. 74 75 4.4) WOL 76 Wake up on Lan feature through Magic and Unicast frames are supported for the GMAC 77 core. 78 79 4.5) DMA descriptors 80 Driver handles both normal and enhanced descriptors. The latter has been only 81 tested on DWC Ether MAC 10/100/1000 Universal version 3.41a and later. 82 83 STMMAC supports DMA descriptor to operate both in dual buffer (RING) 84 and linked-list(CHAINED) mode. In RING each descriptor points to two 85 data buffer pointers whereas in CHAINED mode they point to only one data 86 buffer pointer. RING mode is the default. 87 88 In CHAINED mode each descriptor will have pointer to next descriptor in 89 the list, hence creating the explicit chaining in the descriptor itself, 90 whereas such explicit chaining is not possible in RING mode. 91 92 4.6) Ethtool support 93 Ethtool is supported. Driver statistics and internal errors can be taken using: 94 ethtool -S ethX command. It is possible to dump registers etc. 95 96 4.7) Jumbo and Segmentation Offloading 97 Jumbo frames are supported and tested for the GMAC. 98 The GSO has been also added but it's performed in software. 99 LRO is not supported. 100 101 4.8) Physical 102 The driver is compatible with PAL to work with PHY and GPHY devices. 103 104 4.9) Platform information 105 Several driver's information can be passed through the platform 106 These are included in the include/linux/stmmac.h header file 107 and detailed below as well: 108 109 struct plat_stmmacenet_data { 110 int bus_id; 111 int phy_addr; 112 int interface; 113 struct stmmac_mdio_bus_data *mdio_bus_data; 114 int pbl; 115 int clk_csr; 116 int has_gmac; 117 int enh_desc; 118 int tx_coe; 119 int bugged_jumbo; 120 int pmt; 121 int force_sf_dma_mode; 122 void (*fix_mac_speed)(void *priv, unsigned int speed); 123 void (*bus_setup)(void __iomem *ioaddr); 124 int (*init)(struct platform_device *pdev); 125 void (*exit)(struct platform_device *pdev); 126 void *bsp_priv; 127 }; 128 129 Where: 130 o bus_id: bus identifier. 131 o phy_addr: the physical address can be passed from the platform. 132 If it is set to -1 the driver will automatically 133 detect it at run-time by probing all the 32 addresses. 134 o interface: PHY device's interface. 135 o mdio_bus_data: specific platform fields for the MDIO bus. 136 o pbl: the Programmable Burst Length is maximum number of beats to 137 be transferred in one DMA transaction. 138 GMAC also enables the 4xPBL by default. 139 o clk_csr: CSR Clock range selection. 140 o has_gmac: uses the GMAC core. 141 o enh_desc: if sets the MAC will use the enhanced descriptor structure. 142 o tx_coe: core is able to perform the tx csum in HW. 143 o bugged_jumbo: some HWs are not able to perform the csum in HW for 144 over-sized frames due to limited buffer sizes. 145 Setting this flag the csum will be done in SW on 146 JUMBO frames. 147 o pmt: core has the embedded power module (optional). 148 o force_sf_dma_mode: force DMA to use the Store and Forward mode 149 instead of the Threshold. 150 o fix_mac_speed: this callback is used for modifying some syscfg registers 151 (on ST SoCs) according to the link speed negotiated by the 152 physical layer . 153 o bus_setup: perform HW setup of the bus. For example, on some ST platforms 154 this field is used to configure the AMBA bridge to generate more 155 efficient STBus traffic. 156 o init/exit: callbacks used for calling a custom initialisation; 157 this is sometime necessary on some platforms (e.g. ST boxes) 158 where the HW needs to have set some PIO lines or system cfg 159 registers. 160 o custom_cfg: this is a custom configuration that can be passed while 161 initialising the resources. 162 163 The we have: 164 165 struct stmmac_mdio_bus_data { 166 int bus_id; 167 int (*phy_reset)(void *priv); 168 unsigned int phy_mask; 169 int *irqs; 170 int probed_phy_irq; 171 }; 172 173 Where: 174 o bus_id: bus identifier; 175 o phy_reset: hook to reset the phy device attached to the bus. 176 o phy_mask: phy mask passed when register the MDIO bus within the driver. 177 o irqs: list of IRQs, one per PHY. 178 o probed_phy_irq: if irqs is NULL, use this for probed PHY. 179 180 Below an example how the structures above are using on ST platforms. 181 182 static struct plat_stmmacenet_data stxYYY_ethernet_platform_data = { 183 .pbl = 32, 184 .has_gmac = 0, 185 .enh_desc = 0, 186 .fix_mac_speed = stxYYY_ethernet_fix_mac_speed, 187 | 188 |-> to write an internal syscfg 189 | on this platform when the 190 | link speed changes from 10 to 191 | 100 and viceversa 192 .init = &stmmac_claim_resource, 193 | 194 |-> On ST SoC this calls own "PAD" 195 | manager framework to claim 196 | all the resources necessary 197 | (GPIO ...). The .custom_cfg field 198 | is used to pass a custom config. 199 }; 200 201 Below the usage of the stmmac_mdio_bus_data: on this SoC, in fact, 202 there are two MAC cores: one MAC is for MDIO Bus/PHY emulation 203 with fixed_link support. 204 205 static struct stmmac_mdio_bus_data stmmac1_mdio_bus = { 206 .bus_id = 1, 207 | 208 |-> phy device on the bus_id 1 209 .phy_reset = phy_reset; 210 | 211 |-> function to provide the phy_reset on this board 212 .phy_mask = 0, 213 }; 214 215 static struct fixed_phy_status stmmac0_fixed_phy_status = { 216 .link = 1, 217 .speed = 100, 218 .duplex = 1, 219 }; 220 221 During the board's device_init we can configure the first 222 MAC for fixed_link by calling: 223 fixed_phy_add(PHY_POLL, 1, &stmmac0_fixed_phy_status));) 224 and the second one, with a real PHY device attached to the bus, 225 by using the stmmac_mdio_bus_data structure (to provide the id, the 226 reset procedure etc). 227 228 4.10) List of source files: 229 o Kconfig 230 o Makefile 231 o stmmac_main.c: main network device driver; 232 o stmmac_mdio.c: mdio functions; 233 o stmmac_ethtool.c: ethtool support; 234 o stmmac_timer.[ch]: timer code used for mitigating the driver dma interrupts 235 Only tested on ST40 platforms based. 236 o stmmac.h: private driver structure; 237 o common.h: common definitions and VFTs; 238 o descs.h: descriptor structure definitions; 239 o dwmac1000_core.c: GMAC core functions; 240 o dwmac1000_dma.c: dma functions for the GMAC chip; 241 o dwmac1000.h: specific header file for the GMAC; 242 o dwmac100_core: MAC 100 core and dma code; 243 o dwmac100_dma.c: dma funtions for the MAC chip; 244 o dwmac1000.h: specific header file for the MAC; 245 o dwmac_lib.c: generic DMA functions shared among chips 246 o enh_desc.c: functions for handling enhanced descriptors 247 o norm_desc.c: functions for handling normal descriptors 248 249 5) Debug Information 250 251 The driver exports many information i.e. internal statistics, 252 debug information, MAC and DMA registers etc. 253 254 These can be read in several ways depending on the 255 type of the information actually needed. 256 257 For example a user can be use the ethtool support 258 to get statistics: e.g. using: ethtool -S ethX 259 (that shows the Management counters (MMC) if supported) 260 or sees the MAC/DMA registers: e.g. using: ethtool -d ethX 261 262 Compiling the Kernel with CONFIG_DEBUG_FS and enabling the 263 STMMAC_DEBUG_FS option the driver will export the following 264 debugfs entries: 265 266 /sys/kernel/debug/stmmaceth/descriptors_status 267 To show the DMA TX/RX descriptor rings 268 269 Developer can also use the "debug" module parameter to get 270 further debug information. 271 272 In the end, there are other macros (that cannot be enabled 273 via menuconfig) to turn-on the RX/TX DMA debugging, 274 specific MAC core debug printk etc. Others to enable the 275 debug in the TX and RX processes. 276 All these are only useful during the developing stage 277 and should never enabled inside the code for general usage. 278 In fact, these can generate an huge amount of debug messages. 279 280 6) TODO: 281 o XGMAC is not supported. 282 o Add the EEE - Energy Efficient Ethernet 283 o Add the PTP - precision time protocol