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Documentation / devicetree / bindings / pinctrl / renesas,pfc-pinctrl.txt




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Based on kernel version 4.8. Page generated on 2016-10-06 23:13 EST.

1	* Renesas Pin Function Controller (GPIO and Pin Mux/Config)
2	
3	The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
4	R8A73A4 and R8A7740 it also acts as a GPIO controller.
5	
6	
7	Pin Control
8	-----------
9	
10	Required Properties:
11	
12	  - compatible: should be one of the following.
13	    - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
14	    - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
15	    - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
16	    - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
17	    - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
18	    - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
19	    - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
20	    - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
21	    - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
22	    - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
23	    - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
24	
25	  - reg: Base address and length of each memory resource used by the pin
26	    controller hardware module.
27	
28	Optional properties:
29	
30	  - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
31	    otherwise. Should be 3.
32	
33	  - interrupts-extended: Specify the interrupts associated with external
34	    IRQ pins. This property is mandatory when the PFC handles GPIOs and
35	    forbidden otherwise. When specified, it must contain one interrupt per
36	    external IRQ, sorted by external IRQ number.
37	
38	The PFC node also acts as a container for pin configuration nodes. Please refer
39	to pinctrl-bindings.txt in this directory for the definition of the term "pin
40	configuration node" and for the common pinctrl bindings used by client devices.
41	
42	Each pin configuration node represents a desired configuration for a pin, a
43	pin group, or a list of pins or pin groups. The configuration can include the
44	function to select on those pin(s) and pin configuration parameters (such as
45	pull-up and pull-down).
46	
47	Pin configuration nodes contain pin configuration properties, either directly
48	or grouped in child subnodes. Both pin muxing and configuration parameters can
49	be grouped in that way and referenced as a single pin configuration node by
50	client devices.
51	
52	A configuration node or subnode must reference at least one pin (through the
53	pins or pin groups properties) and contain at least a function or one
54	configuration parameter. When the function is present only pin groups can be
55	used to reference pins.
56	
57	All pin configuration nodes and subnodes names are ignored. All of those nodes
58	are parsed through phandles and processed purely based on their content.
59	
60	Pin Configuration Node Properties:
61	
62	- pins : An array of strings, each string containing the name of a pin.
63	- groups : An array of strings, each string containing the name of a pin
64	  group.
65	
66	- function: A string containing the name of the function to mux to the pin
67	  group(s) specified by the groups property.
68	
69	  Valid values for pin, group and function names can be found in the group and
70	  function arrays of the PFC data file corresponding to the SoC
71	  (drivers/pinctrl/sh-pfc/pfc-*.c)
72	
73	The pin configuration parameters use the generic pinconf bindings defined in
74	pinctrl-bindings.txt in this directory. The supported parameters are
75	bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. For
76	pins that have a configurable I/O voltage, the power-source value should be the
77	nominal I/O voltage in millivolts.
78	
79	
80	GPIO
81	----
82	
83	On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
84	
85	Required Properties:
86	
87	  - gpio-controller: Marks the device node as a gpio controller.
88	
89	  - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
90	    cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
91	    GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
92	
93	The syntax of the gpio specifier used by client nodes should be the following
94	with values derived from the SoC user manual.
95	
96	  <[phandle of the gpio controller node]
97	   [pin number within the gpio controller]
98	   [flags]>
99	
100	On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
101	Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
102	for documentation of the GPIO device tree bindings on those platforms.
103	
104	
105	Examples
106	--------
107	
108	Example 1: SH73A0 (SH-Mobile AG5) pin controller node
109	
110		pfc: pfc@e6050000 {
111			compatible = "renesas,pfc-sh73a0";
112			reg = <0xe6050000 0x8000>,
113			      <0xe605801c 0x1c>;
114			gpio-controller;
115			#gpio-cells = <2>;
116			interrupts-extended =
117				<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
118				<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
119				<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
120				<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
121				<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
122				<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
123				<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
124				<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
125		};
126	
127	Example 2: A GPIO LED node that references a GPIO
128	
129		#include <dt-bindings/gpio/gpio.h>
130	
131		leds {
132			compatible = "gpio-leds";
133			led1 {
134				gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
135			};
136		};
137	
138	Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
139	           for the MMCIF and SCIFA4 devices
140	
141		&pfc {
142			pinctrl-0 = <&scifa4_pins>;
143			pinctrl-names = "default";
144	
145			mmcif_pins: mmcif {
146				mux {
147					groups = "mmc0_data8_0", "mmc0_ctrl_0";
148					function = "mmc0";
149				};
150				cfg {
151					groups = "mmc0_data8_0";
152					pins = "PORT279";
153					bias-pull-up;
154				};
155			};
156	
157			scifa4_pins: scifa4 {
158				groups = "scifa4_data", "scifa4_ctrl";
159				function = "scifa4";
160			};
161		};
162	
163	Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
164	
165		&mmcif {
166			pinctrl-0 = <&mmcif_pins>;
167			pinctrl-names = "default";
168	
169			bus-width = <8>;
170			vmmc-supply = <&reg_1p8v>;
171			status = "okay";
172		};
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