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Documentation / devicetree / bindings / pinctrl / renesas,pfc-pinctrl.txt




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Based on kernel version 4.13.3. Page generated on 2017-09-23 13:55 EST.

1	* Renesas Pin Function Controller (GPIO and Pin Mux/Config)
2	
3	The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
4	R8A73A4 and R8A7740 it also acts as a GPIO controller.
5	
6	
7	Pin Control
8	-----------
9	
10	Required Properties:
11	
12	  - compatible: should be one of the following.
13	    - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
14	    - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
15	    - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
16	    - "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.
17	    - "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.
18	    - "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
19	    - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
20	    - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
21	    - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
22	    - "renesas,pfc-r8a7792": for R8A7792 (R-Car V2H) compatible pin-controller.
23	    - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
24	    - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
25	    - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
26	    - "renesas,pfc-r8a7796": for R8A7796 (R-Car M3-W) compatible pin-controller.
27	    - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
28	
29	  - reg: Base address and length of each memory resource used by the pin
30	    controller hardware module.
31	
32	Optional properties:
33	
34	  - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
35	    otherwise. Should be 3.
36	
37	  - interrupts-extended: Specify the interrupts associated with external
38	    IRQ pins. This property is mandatory when the PFC handles GPIOs and
39	    forbidden otherwise. When specified, it must contain one interrupt per
40	    external IRQ, sorted by external IRQ number.
41	
42	The PFC node also acts as a container for pin configuration nodes. Please refer
43	to pinctrl-bindings.txt in this directory for the definition of the term "pin
44	configuration node" and for the common pinctrl bindings used by client devices.
45	
46	Each pin configuration node represents a desired configuration for a pin, a
47	pin group, or a list of pins or pin groups. The configuration can include the
48	function to select on those pin(s) and pin configuration parameters (such as
49	pull-up and pull-down).
50	
51	Pin configuration nodes contain pin configuration properties, either directly
52	or grouped in child subnodes. Both pin muxing and configuration parameters can
53	be grouped in that way and referenced as a single pin configuration node by
54	client devices.
55	
56	A configuration node or subnode must reference at least one pin (through the
57	pins or pin groups properties) and contain at least a function or one
58	configuration parameter. When the function is present only pin groups can be
59	used to reference pins.
60	
61	All pin configuration nodes and subnodes names are ignored. All of those nodes
62	are parsed through phandles and processed purely based on their content.
63	
64	Pin Configuration Node Properties:
65	
66	- pins : An array of strings, each string containing the name of a pin.
67	- groups : An array of strings, each string containing the name of a pin
68	  group.
69	
70	- function: A string containing the name of the function to mux to the pin
71	  group(s) specified by the groups property.
72	
73	  Valid values for pin, group and function names can be found in the group and
74	  function arrays of the PFC data file corresponding to the SoC
75	  (drivers/pinctrl/sh-pfc/pfc-*.c)
76	
77	The pin configuration parameters use the generic pinconf bindings defined in
78	pinctrl-bindings.txt in this directory. The supported parameters are
79	bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. For
80	pins that have a configurable I/O voltage, the power-source value should be the
81	nominal I/O voltage in millivolts.
82	
83	
84	GPIO
85	----
86	
87	On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
88	
89	Required Properties:
90	
91	  - gpio-controller: Marks the device node as a gpio controller.
92	
93	  - #gpio-cells: Should be 2. The first cell is the GPIO number and the second
94	    cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
95	    GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
96	
97	The syntax of the gpio specifier used by client nodes should be the following
98	with values derived from the SoC user manual.
99	
100	  <[phandle of the gpio controller node]
101	   [pin number within the gpio controller]
102	   [flags]>
103	
104	On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
105	Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
106	for documentation of the GPIO device tree bindings on those platforms.
107	
108	
109	Examples
110	--------
111	
112	Example 1: SH73A0 (SH-Mobile AG5) pin controller node
113	
114		pfc: pfc@e6050000 {
115			compatible = "renesas,pfc-sh73a0";
116			reg = <0xe6050000 0x8000>,
117			      <0xe605801c 0x1c>;
118			gpio-controller;
119			#gpio-cells = <2>;
120			interrupts-extended =
121				<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
122				<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
123				<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
124				<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
125				<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
126				<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
127				<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
128				<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
129		};
130	
131	Example 2: A GPIO LED node that references a GPIO
132	
133		#include <dt-bindings/gpio/gpio.h>
134	
135		leds {
136			compatible = "gpio-leds";
137			led1 {
138				gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
139			};
140		};
141	
142	Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
143	           for the MMCIF and SCIFA4 devices
144	
145		&pfc {
146			pinctrl-0 = <&scifa4_pins>;
147			pinctrl-names = "default";
148	
149			mmcif_pins: mmcif {
150				mux {
151					groups = "mmc0_data8_0", "mmc0_ctrl_0";
152					function = "mmc0";
153				};
154				cfg {
155					groups = "mmc0_data8_0";
156					pins = "PORT279";
157					bias-pull-up;
158				};
159			};
160	
161			scifa4_pins: scifa4 {
162				groups = "scifa4_data", "scifa4_ctrl";
163				function = "scifa4";
164			};
165		};
166	
167	Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
168	
169		&mmcif {
170			pinctrl-0 = <&mmcif_pins>;
171			pinctrl-names = "default";
172	
173			bus-width = <8>;
174			vmmc-supply = <&reg_1p8v>;
175			status = "okay";
176		};
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