# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/fsl,micfil.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP MICFIL Digital Audio Interface (MICFIL)

maintainers:
  - Shengjiu Wang <shengjiu.wang@nxp.com>

description: |
  The MICFIL digital interface provides a 16-bit or 24-bit audio signal
  from a PDM microphone bitstream in a configurable output sampling rate.

properties:
  compatible:
    enum:
      - fsl,imx8mm-micfil
      - fsl,imx8mp-micfil
      - fsl,imx93-micfil

  reg:
    maxItems: 1

  interrupts:
    items:
      - description: Digital Microphone interface interrupt
      - description: Digital Microphone interface error interrupt
      - description: voice activity detector event interrupt
      - description: voice activity detector error interrupt

  dmas:
    items:
      - description: DMA controller phandle and request line for RX

  dma-names:
    items:
      - const: rx

  clocks:
    items:
      - description: The ipg clock for register access
      - description: internal micfil clock
      - description: PLL clock source for 8kHz series
      - description: PLL clock source for 11kHz series
      - description: External clock 3
    minItems: 2

  clock-names:
    items:
      - const: ipg_clk
      - const: ipg_clk_app
      - const: pll8k
      - const: pll11k
      - const: clkext3
    minItems: 2
 
  "#sound-dai-cells":
    const: 0

required:
  - compatible
  - reg
  - interrupts
  - dmas
  - dma-names
  - clocks
  - clock-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/clock/imx8mm-clock.h>
    micfil: audio-controller@30080000 {
        compatible = "fsl,imx8mm-micfil";
        reg = <0x30080000 0x10000>;
        interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&clk IMX8MM_CLK_PDM_IPG>,
                 <&clk IMX8MM_CLK_PDM_ROOT>;
        clock-names = "ipg_clk", "ipg_clk_app";
        dmas = <&sdma2 24 25 0>;
        dma-names = "rx";
    };