Based on kernel version 6.8
. Page generated on 2024-03-11 21:26 EST
.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/sound/ti,tlv320adc3xxx.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Texas Instruments TLV320ADC3001/TLV320ADC3101 Stereo ADC maintainers: - Ricard Wanderlof <ricardw@axis.com> description: | Texas Instruments TLV320ADC3001 and TLV320ADC3101 Stereo ADC https://www.ti.com/product/TLV320ADC3001 https://www.ti.com/product/TLV320ADC3101 allOf: - $ref: dai-common.yaml# properties: compatible: enum: - ti,tlv320adc3001 - ti,tlv320adc3101 reg: maxItems: 1 description: I2C address '#sound-dai-cells': const: 0 '#gpio-cells': const: 2 gpio-controller: true reset-gpios: maxItems: 1 description: GPIO pin used for codec reset (RESET pin) clocks: maxItems: 1 description: Master clock (MCLK) ti,dmdin-gpio1: $ref: /schemas/types.yaml#/definitions/uint32 enum: - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions - 2 # ADC3XXX_GPIO_GPI - General purpose input - 3 # ADC3XXX_GPIO_GPO - General purpose output - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg - 5 # ADC3XXX_GPIO_INT1 - INT1 output - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK default: 0 description: | Configuration for DMDIN/GPIO1 pin. When ADC3XXX_GPIO_GPO is configured, this causes corresponding the ALSA control "GPIOx Output" to appear, as a switch control. ti,dmclk-gpio2: $ref: /schemas/types.yaml#/definitions/uint32 enum: - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions - 2 # ADC3XXX_GPIO_GPI - General purpose input - 3 # ADC3XXX_GPIO_GPO - General purpose output - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg - 5 # ADC3XXX_GPIO_INT1 - INT1 output - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK default: 0 description: | Configuration for DMCLK/GPIO2 pin. When ADC3XXX_GPIO_GPO is configured, this causes corresponding the ALSA control "GPIOx Output" to appear, as a switch control. Note that there is currently no support for reading the GPIO pins as inputs. ti,micbias1-vg: $ref: /schemas/types.yaml#/definitions/uint32 enum: - 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down - 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V - 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V - 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply default: 0 description: | Mic bias voltage output on MICBIAS1 pin ti,micbias2-vg: $ref: /schemas/types.yaml#/definitions/uint32 enum: - 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down - 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V - 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V - 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply default: 0 description: | Mic bias voltage output on MICBIAS2 pin required: - compatible - reg - clocks unevaluatedProperties: false examples: - | #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/sound/tlv320adc3xxx.h> i2c { #address-cells = <1>; #size-cells = <0>; tlv320adc3101: audio-codec@18 { compatible = "ti,tlv320adc3101"; reg = <0x18>; reset-gpios = <&gpio_pc 3 GPIO_ACTIVE_LOW>; clocks = <&audio_mclk>; gpio-controller; #gpio-cells = <2>; ti,dmdin-gpio1 = <ADC3XXX_GPIO_GPO>; ti,micbias1-vg = <ADC3XXX_MICBIAS_AVDD>; }; }; audio_mclk: clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <24576000>; }; ... |