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Documentation / devicetree / bindings / i2c / i2c-exynos5.txt




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Based on kernel version 4.0. Page generated on 2015-04-14 21:21 EST.

1	* Samsung's High Speed I2C controller
2	
3	The Samsung's High Speed I2C controller is used to interface with I2C devices
4	at various speeds ranging from 100khz to 3.4Mhz.
5	
6	Required properties:
7	  - compatible: value should be.
8		-> "samsung,exynos5-hsi2c", (DEPRECATED)
9					for i2c compatible with HSI2C available
10					on Exynos5250 and Exynos5420 SoCs.
11		-> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available
12					on Exynos5250 and Exynos5420 SoCs.
13		-> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available
14					on Exynos5260 SoCs.
15		-> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available
16					on Exynos7 SoCs.
17	
18	  - reg: physical base address of the controller and length of memory mapped
19	    region.
20	  - interrupts: interrupt number to the cpu.
21	  - #address-cells: always 1 (for i2c addresses)
22	  - #size-cells: always 0
23	
24	  - Pinctrl:
25	    - pinctrl-0: Pin control group to be used for this controller.
26	    - pinctrl-names: Should contain only one value - "default".
27	
28	Optional properties:
29	  - clock-frequency: Desired operating frequency in Hz of the bus.
30	    -> If not specified, the bus operates in fast-speed mode at
31	       at 100khz.
32	    -> If specified, the bus operates in high-speed mode only if the
33	       clock-frequency is >= 1Mhz.
34	
35	Example:
36	
37	hsi2c@12ca0000 {
38		compatible = "samsung,exynos5250-hsi2c";
39		reg = <0x12ca0000 0x100>;
40		interrupts = <56>;
41		clock-frequency = <100000>;
42	
43		pinctrl-0 = <&i2c4_bus>;
44		pinctrl-names = "default";
45	
46		#address-cells = <1>;
47		#size-cells = <0>;
48	
49		s2mps11_pmic@66 {
50			compatible = "samsung,s2mps11-pmic";
51			reg = <0x66>;
52		};
53	};
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