Based on kernel version 3.2. Page generated on 2012-01-05 23:28 EST.
1 Kernel driver lm90 2 ================== 3 4 Supported chips: 5 * National Semiconductor LM90 6 Prefix: 'lm90' 7 Addresses scanned: I2C 0x4c 8 Datasheet: Publicly available at the National Semiconductor website 9 http://www.national.com/pf/LM/LM90.html 10 * National Semiconductor LM89 11 Prefix: 'lm89' (no auto-detection) 12 Addresses scanned: I2C 0x4c and 0x4d 13 Datasheet: Publicly available at the National Semiconductor website 14 http://www.national.com/mpf/LM/LM89.html 15 * National Semiconductor LM99 16 Prefix: 'lm99' 17 Addresses scanned: I2C 0x4c and 0x4d 18 Datasheet: Publicly available at the National Semiconductor website 19 http://www.national.com/pf/LM/LM99.html 20 * National Semiconductor LM86 21 Prefix: 'lm86' 22 Addresses scanned: I2C 0x4c 23 Datasheet: Publicly available at the National Semiconductor website 24 http://www.national.com/mpf/LM/LM86.html 25 * Analog Devices ADM1032 26 Prefix: 'adm1032' 27 Addresses scanned: I2C 0x4c and 0x4d 28 Datasheet: Publicly available at the ON Semiconductor website 29 http://www.onsemi.com/PowerSolutions/product.do?id=ADM1032 30 * Analog Devices ADT7461 31 Prefix: 'adt7461' 32 Addresses scanned: I2C 0x4c and 0x4d 33 Datasheet: Publicly available at the ON Semiconductor website 34 http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461 35 * Analog Devices ADT7461A 36 Prefix: 'adt7461a' 37 Addresses scanned: I2C 0x4c and 0x4d 38 Datasheet: Publicly available at the ON Semiconductor website 39 http://www.onsemi.com/PowerSolutions/product.do?id=ADT7461A 40 * ON Semiconductor NCT1008 41 Prefix: 'nct1008' 42 Addresses scanned: I2C 0x4c and 0x4d 43 Datasheet: Publicly available at the ON Semiconductor website 44 http://www.onsemi.com/PowerSolutions/product.do?id=NCT1008 45 * Maxim MAX6646 46 Prefix: 'max6646' 47 Addresses scanned: I2C 0x4d 48 Datasheet: Publicly available at the Maxim website 49 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497 50 * Maxim MAX6647 51 Prefix: 'max6646' 52 Addresses scanned: I2C 0x4e 53 Datasheet: Publicly available at the Maxim website 54 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497 55 * Maxim MAX6648 56 Prefix: 'max6646' 57 Addresses scanned: I2C 0x4c 58 Datasheet: Publicly available at the Maxim website 59 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500 60 * Maxim MAX6649 61 Prefix: 'max6646' 62 Addresses scanned: I2C 0x4c 63 Datasheet: Publicly available at the Maxim website 64 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3497 65 * Maxim MAX6657 66 Prefix: 'max6657' 67 Addresses scanned: I2C 0x4c 68 Datasheet: Publicly available at the Maxim website 69 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 70 * Maxim MAX6658 71 Prefix: 'max6657' 72 Addresses scanned: I2C 0x4c 73 Datasheet: Publicly available at the Maxim website 74 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 75 * Maxim MAX6659 76 Prefix: 'max6659' 77 Addresses scanned: I2C 0x4c, 0x4d, 0x4e 78 Datasheet: Publicly available at the Maxim website 79 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 80 * Maxim MAX6680 81 Prefix: 'max6680' 82 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 83 0x4c, 0x4d and 0x4e 84 Datasheet: Publicly available at the Maxim website 85 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370 86 * Maxim MAX6681 87 Prefix: 'max6680' 88 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 89 0x4c, 0x4d and 0x4e 90 Datasheet: Publicly available at the Maxim website 91 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370 92 * Maxim MAX6692 93 Prefix: 'max6646' 94 Addresses scanned: I2C 0x4c 95 Datasheet: Publicly available at the Maxim website 96 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3500 97 * Maxim MAX6695 98 Prefix: 'max6695' 99 Addresses scanned: I2C 0x18 100 Datasheet: Publicly available at the Maxim website 101 http://www.maxim-ic.com/datasheet/index.mvp/id/4199 102 * Maxim MAX6696 103 Prefix: 'max6695' 104 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 105 0x4c, 0x4d and 0x4e 106 Datasheet: Publicly available at the Maxim website 107 http://www.maxim-ic.com/datasheet/index.mvp/id/4199 108 * Winbond/Nuvoton W83L771W/G 109 Prefix: 'w83l771' 110 Addresses scanned: I2C 0x4c 111 Datasheet: No longer available 112 * Winbond/Nuvoton W83L771AWG/ASG 113 Prefix: 'w83l771' 114 Addresses scanned: I2C 0x4c 115 Datasheet: Not publicly available, can be requested from Nuvoton 116 * Philips/NXP SA56004X 117 Prefix: 'sa56004' 118 Addresses scanned: I2C 0x48 through 0x4F 119 Datasheet: Publicly available at NXP website 120 http://ics.nxp.com/products/interface/datasheet/sa56004x.pdf 121 122 Author: Jean Delvare <khali@linux-fr.org> 123 124 125 Description 126 ----------- 127 128 The LM90 is a digital temperature sensor. It senses its own temperature as 129 well as the temperature of up to one external diode. It is compatible 130 with many other devices, many of which are supported by this driver. 131 132 Note that there is no easy way to differentiate between the MAX6657, 133 MAX6658 and MAX6659 variants. The extra features of the MAX6659 are only 134 supported by this driver if the chip is located at address 0x4d or 0x4e, 135 or if the chip type is explicitly selected as max6659. 136 The MAX6680 and MAX6681 only differ in their pinout, therefore they obviously 137 can't (and don't need to) be distinguished. 138 139 The specificity of this family of chipsets over the ADM1021/LM84 140 family is that it features critical limits with hysteresis, and an 141 increased resolution of the remote temperature measurement. 142 143 The different chipsets of the family are not strictly identical, although 144 very similar. For reference, here comes a non-exhaustive list of specific 145 features: 146 147 LM90: 148 * Filter and alert configuration register at 0xBF. 149 * ALERT is triggered by temperatures over critical limits. 150 151 LM86 and LM89: 152 * Same as LM90 153 * Better external channel accuracy 154 155 LM99: 156 * Same as LM89 157 * External temperature shifted by 16 degrees down 158 159 ADM1032: 160 * Consecutive alert register at 0x22. 161 * Conversion averaging. 162 * Up to 64 conversions/s. 163 * ALERT is triggered by open remote sensor. 164 * SMBus PEC support for Write Byte and Receive Byte transactions. 165 166 ADT7461, ADT7461A, NCT1008: 167 * Extended temperature range (breaks compatibility) 168 * Lower resolution for remote temperature 169 170 MAX6657 and MAX6658: 171 * Better local resolution 172 * Remote sensor type selection 173 174 MAX6659: 175 * Better local resolution 176 * Selectable address 177 * Second critical temperature limit 178 * Remote sensor type selection 179 180 MAX6680 and MAX6681: 181 * Selectable address 182 * Remote sensor type selection 183 184 MAX6695 and MAX6696: 185 * Better local resolution 186 * Selectable address (max6696) 187 * Second critical temperature limit 188 * Two remote sensors 189 190 W83L771W/G 191 * The G variant is lead-free, otherwise similar to the W. 192 * Filter and alert configuration register at 0xBF 193 * Moving average (depending on conversion rate) 194 195 W83L771AWG/ASG 196 * Successor of the W83L771W/G, same features. 197 * The AWG and ASG variants only differ in package format. 198 * Diode ideality factor configuration (remote sensor) at 0xE3 199 200 SA56004X: 201 * Better local resolution 202 203 All temperature values are given in degrees Celsius. Resolution 204 is 1.0 degree for the local temperature, 0.125 degree for the remote 205 temperature, except for the MAX6657, MAX6658 and MAX6659 which have a 206 resolution of 0.125 degree for both temperatures. 207 208 Each sensor has its own high and low limits, plus a critical limit. 209 Additionally, there is a relative hysteresis value common to both critical 210 values. To make life easier to user-space applications, two absolute values 211 are exported, one for each channel, but these values are of course linked. 212 Only the local hysteresis can be set from user-space, and the same delta 213 applies to the remote hysteresis. 214 215 The lm90 driver will not update its values more frequently than configured with 216 the update_interval attribute; reading them more often will do no harm, but will 217 return 'old' values. 218 219 SMBus Alert Support 220 ------------------- 221 222 This driver has basic support for SMBus alert. When an alert is received, 223 the status register is read and the faulty temperature channel is logged. 224 225 The Analog Devices chips (ADM1032, ADT7461 and ADT7461A) and ON 226 Semiconductor chips (NCT1008) do not implement the SMBus alert protocol 227 properly so additional care is needed: the ALERT output is disabled when 228 an alert is received, and is re-enabled only when the alarm is gone. 229 Otherwise the chip would block alerts from other chips in the bus as long 230 as the alarm is active. 231 232 PEC Support 233 ----------- 234 235 The ADM1032 is the only chip of the family which supports PEC. It does 236 not support PEC on all transactions though, so some care must be taken. 237 238 When reading a register value, the PEC byte is computed and sent by the 239 ADM1032 chip. However, in the case of a combined transaction (SMBus Read 240 Byte), the ADM1032 computes the CRC value over only the second half of 241 the message rather than its entirety, because it thinks the first half 242 of the message belongs to a different transaction. As a result, the CRC 243 value differs from what the SMBus master expects, and all reads fail. 244 245 For this reason, the lm90 driver will enable PEC for the ADM1032 only if 246 the bus supports the SMBus Send Byte and Receive Byte transaction types. 247 These transactions will be used to read register values, instead of 248 SMBus Read Byte, and PEC will work properly. 249 250 Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC. 251 Instead, it will try to write the PEC value to the register (because the 252 SMBus Send Byte transaction with PEC is similar to a Write Byte transaction 253 without PEC), which is not what we want. Thus, PEC is explicitly disabled 254 on SMBus Send Byte transactions in the lm90 driver. 255 256 PEC on byte data transactions represents a significant increase in bandwidth 257 usage (+33% for writes, +25% for reads) in normal conditions. With the need 258 to use two SMBus transaction for reads, this overhead jumps to +50%. Worse, 259 two transactions will typically mean twice as much delay waiting for 260 transaction completion, effectively doubling the register cache refresh time. 261 I guess reliability comes at a price, but it's quite expensive this time. 262 263 So, as not everyone might enjoy the slowdown, PEC can be disabled through 264 sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1 265 to that file to enable PEC again.