Based on kernel version 2.6.26. Page generated on 2008-07-16 21:12 EST.
1 Kernel driver lm90 2 ================== 3 4 Supported chips: 5 * National Semiconductor LM90 6 Prefix: 'lm90' 7 Addresses scanned: I2C 0x4c 8 Datasheet: Publicly available at the National Semiconductor website 9 http://www.national.com/pf/LM/LM90.html 10 * National Semiconductor LM89 11 Prefix: 'lm99' 12 Addresses scanned: I2C 0x4c and 0x4d 13 Datasheet: Publicly available at the National Semiconductor website 14 http://www.national.com/pf/LM/LM89.html 15 * National Semiconductor LM99 16 Prefix: 'lm99' 17 Addresses scanned: I2C 0x4c and 0x4d 18 Datasheet: Publicly available at the National Semiconductor website 19 http://www.national.com/pf/LM/LM99.html 20 * National Semiconductor LM86 21 Prefix: 'lm86' 22 Addresses scanned: I2C 0x4c 23 Datasheet: Publicly available at the National Semiconductor website 24 http://www.national.com/pf/LM/LM86.html 25 * Analog Devices ADM1032 26 Prefix: 'adm1032' 27 Addresses scanned: I2C 0x4c and 0x4d 28 Datasheet: Publicly available at the Analog Devices website 29 http://www.analog.com/en/prod/0,2877,ADM1032,00.html 30 * Analog Devices ADT7461 31 Prefix: 'adt7461' 32 Addresses scanned: I2C 0x4c and 0x4d 33 Datasheet: Publicly available at the Analog Devices website 34 http://www.analog.com/en/prod/0,2877,ADT7461,00.html 35 Note: Only if in ADM1032 compatibility mode 36 * Maxim MAX6657 37 Prefix: 'max6657' 38 Addresses scanned: I2C 0x4c 39 Datasheet: Publicly available at the Maxim website 40 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 41 * Maxim MAX6658 42 Prefix: 'max6657' 43 Addresses scanned: I2C 0x4c 44 Datasheet: Publicly available at the Maxim website 45 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 46 * Maxim MAX6659 47 Prefix: 'max6657' 48 Addresses scanned: I2C 0x4c, 0x4d (unsupported 0x4e) 49 Datasheet: Publicly available at the Maxim website 50 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2578 51 * Maxim MAX6680 52 Prefix: 'max6680' 53 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 54 0x4c, 0x4d and 0x4e 55 Datasheet: Publicly available at the Maxim website 56 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370 57 * Maxim MAX6681 58 Prefix: 'max6680' 59 Addresses scanned: I2C 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 60 0x4c, 0x4d and 0x4e 61 Datasheet: Publicly available at the Maxim website 62 http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370 63 64 65 Author: Jean Delvare <khali[AT]linux-fr[DOT]org> 66 67 68 Description 69 ----------- 70 71 The LM90 is a digital temperature sensor. It senses its own temperature as 72 well as the temperature of up to one external diode. It is compatible 73 with many other devices such as the LM86, the LM89, the LM99, the ADM1032, 74 the MAX6657, MAX6658, MAX6659, MAX6680 and the MAX6681 all of which are 75 supported by this driver. 76 77 Note that there is no easy way to differentiate between the MAX6657, 78 MAX6658 and MAX6659 variants. The extra address and features of the 79 MAX6659 are not supported by this driver. The MAX6680 and MAX6681 only 80 differ in their pinout, therefore they obviously can't (and don't need to) 81 be distinguished. Additionally, the ADT7461 is supported if found in 82 ADM1032 compatibility mode. 83 84 The specificity of this family of chipsets over the ADM1021/LM84 85 family is that it features critical limits with hysteresis, and an 86 increased resolution of the remote temperature measurement. 87 88 The different chipsets of the family are not strictly identical, although 89 very similar. This driver doesn't handle any specific feature for now, 90 with the exception of SMBus PEC. For reference, here comes a non-exhaustive 91 list of specific features: 92 93 LM90: 94 * Filter and alert configuration register at 0xBF. 95 * ALERT is triggered by temperatures over critical limits. 96 97 LM86 and LM89: 98 * Same as LM90 99 * Better external channel accuracy 100 101 LM99: 102 * Same as LM89 103 * External temperature shifted by 16 degrees down 104 105 ADM1032: 106 * Consecutive alert register at 0x22. 107 * Conversion averaging. 108 * Up to 64 conversions/s. 109 * ALERT is triggered by open remote sensor. 110 * SMBus PEC support for Write Byte and Receive Byte transactions. 111 112 ADT7461: 113 * Extended temperature range (breaks compatibility) 114 * Lower resolution for remote temperature 115 116 MAX6657 and MAX6658: 117 * Remote sensor type selection 118 119 MAX6659: 120 * Selectable address 121 * Second critical temperature limit 122 * Remote sensor type selection 123 124 MAX6680 and MAX6681: 125 * Selectable address 126 * Remote sensor type selection 127 128 All temperature values are given in degrees Celsius. Resolution 129 is 1.0 degree for the local temperature, 0.125 degree for the remote 130 temperature. 131 132 Each sensor has its own high and low limits, plus a critical limit. 133 Additionally, there is a relative hysteresis value common to both critical 134 values. To make life easier to user-space applications, two absolute values 135 are exported, one for each channel, but these values are of course linked. 136 Only the local hysteresis can be set from user-space, and the same delta 137 applies to the remote hysteresis. 138 139 The lm90 driver will not update its values more frequently than every 140 other second; reading them more often will do no harm, but will return 141 'old' values. 142 143 PEC Support 144 ----------- 145 146 The ADM1032 is the only chip of the family which supports PEC. It does 147 not support PEC on all transactions though, so some care must be taken. 148 149 When reading a register value, the PEC byte is computed and sent by the 150 ADM1032 chip. However, in the case of a combined transaction (SMBus Read 151 Byte), the ADM1032 computes the CRC value over only the second half of 152 the message rather than its entirety, because it thinks the first half 153 of the message belongs to a different transaction. As a result, the CRC 154 value differs from what the SMBus master expects, and all reads fail. 155 156 For this reason, the lm90 driver will enable PEC for the ADM1032 only if 157 the bus supports the SMBus Send Byte and Receive Byte transaction types. 158 These transactions will be used to read register values, instead of 159 SMBus Read Byte, and PEC will work properly. 160 161 Additionally, the ADM1032 doesn't support SMBus Send Byte with PEC. 162 Instead, it will try to write the PEC value to the register (because the 163 SMBus Send Byte transaction with PEC is similar to a Write Byte transaction 164 without PEC), which is not what we want. Thus, PEC is explicitly disabled 165 on SMBus Send Byte transactions in the lm90 driver. 166 167 PEC on byte data transactions represents a significant increase in bandwidth 168 usage (+33% for writes, +25% for reads) in normal conditions. With the need 169 to use two SMBus transaction for reads, this overhead jumps to +50%. Worse, 170 two transactions will typically mean twice as much delay waiting for 171 transaction completion, effectively doubling the register cache refresh time. 172 I guess reliability comes at a price, but it's quite expensive this time. 173 174 So, as not everyone might enjoy the slowdown, PEC can be disabled through 175 sysfs. Just write 0 to the "pec" file and PEC will be disabled. Write 1 176 to that file to enable PEC again.