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Based on kernel version 3.13. Page generated on 2014-01-20 22:03 EST.

1	Amiga 4-joystick parport extension
2	~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3	Parallel port pins:
4	
5	 (2) - Up1	 (6) - Up2
6	 (3) - Down1	 (7) - Down2
7	 (4) - Left1	 (8) - Left2
8	 (5) - Right1	 (9) - Right2
9	(13) - Fire1	(11) - Fire2
10	(18) - Gnd1	(18) - Gnd2
11	
12	Amiga digital joystick pinout
13	~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14	(1) - Up
15	(2) - Down
16	(3) - Left
17	(4) - Right
18	(5) - n/c
19	(6) - Fire button
20	(7) - +5V (50mA)
21	(8) - Gnd
22	(9) - Thumb button
23	
24	Amiga mouse pinout
25	~~~~~~~~~~~~~~~~~~
26	(1) - V-pulse
27	(2) - H-pulse
28	(3) - VQ-pulse
29	(4) - HQ-pulse
30	(5) - Middle button
31	(6) - Left button
32	(7) - +5V (50mA)
33	(8) - Gnd
34	(9) - Right button
35	
36	Amiga analog joystick pinout
37	~~~~~~~~~~~~~~~~~~~~~~~~~~~~
38	(1) - Top button
39	(2) - Top2 button
40	(3) - Trigger button
41	(4) - Thumb button
42	(5) - Analog X
43	(6) - n/c
44	(7) - +5V (50mA)
45	(8) - Gnd
46	(9) - Analog Y
47	
48	Amiga lightpen pinout
49	~~~~~~~~~~~~~~~~~~~~~
50	(1) - n/c
51	(2) - n/c
52	(3) - n/c
53	(4) - n/c
54	(5) - Touch button
55	(6) - /Beamtrigger
56	(7) - +5V (50mA)
57	(8) - Gnd
58	(9) - Stylus button
59	
60	-------------------------------------------------------------------------------
61	
62	NAME     rev ADDR type chip   Description
63	JOY0DAT      00A   R   Denise Joystick-mouse 0 data (left vert, horiz)
64	JOY1DAT      00C   R   Denise Joystick-mouse 1 data (right vert,horiz)
65	
66	        These addresses each read a 16 bit register. These in turn
67	        are loaded from the MDAT serial stream and are clocked in on
68	        the rising edge of SCLK. MLD output is used to parallel load
69	        the external parallel-to-serial converter.This in turn is
70	        loaded with the 4 quadrature inputs from each of two game
71	        controller ports (8 total) plus 8 miscellaneous control bits
72	        which are new for LISA and can be read in upper 8 bits of
73	        LISAID.
74	        Register bits are as follows:
75	        Mouse counter usage (pins  1,3 =Yclock, pins 2,4 =Xclock)
76	
77	    BIT#  15  14  13  12  11  10  09  08     07  06  05  04  03  02  01  00
78	JOY0DAT   Y7  Y6  Y5  Y4  Y3  Y2  Y1  Y0     X7  X6  X5  X4  X3  X2  X1  X0
79	JOY1DAT   Y7  Y6  Y5  Y4  Y3  Y2  Y1  Y0     X7  X6  X5  X4  X3  X2  X1  X0
80	
81	        0=LEFT CONTROLLER PAIR, 1=RIGHT CONTROLLER PAIR.
82	        (4 counters total). The bit usage for both left and right
83	        addresses is shown below. Each 6 bit counter (Y7-Y2,X7-X2) is
84	        clocked by 2 of the signals input from the mouse serial
85	        stream. Starting with first bit received:
86	
87	         +-------------------+-----------------------------------------+
88	         | Serial | Bit Name | Description                             |
89	         +--------+----------+-----------------------------------------+
90	         |   0    | M0H      | JOY0DAT Horizontal Clock                |
91	         |   1    | M0HQ     | JOY0DAT Horizontal Clock (quadrature)   |
92	         |   2    | M0V      | JOY0DAT Vertical Clock                  |
93	         |   3    | M0VQ     | JOY0DAT Vertical Clock  (quadrature)    |
94	         |   4    | M1V      | JOY1DAT Horizontal Clock                |
95	         |   5    | M1VQ     | JOY1DAT Horizontal Clock (quadrature)   |
96	         |   6    | M1V      | JOY1DAT Vertical Clock                  |
97	         |   7    | M1VQ     | JOY1DAT Vertical Clock (quadrature)     |
98	         +--------+----------+-----------------------------------------+
99	
100	         Bits 1 and 0 of each counter (Y1-Y0,X1-X0) may be
101	         read to determine the state of the related input signal pair.
102	         This allows these pins to double as joystick switch inputs.
103	         Joystick switch closures can be deciphered as follows:
104	
105	         +------------+------+---------------------------------+
106	         | Directions | Pin# | Counter bits                    |
107	         +------------+------+---------------------------------+
108	         | Forward    |  1   | Y1 xor Y0 (BIT#09 xor BIT#08)   |
109	         | Left       |  3   | Y1                              |
110	         | Back       |  2   | X1 xor X0 (BIT#01 xor BIT#00)   |
111	         | Right      |  4   | X1                              |
112	         +------------+------+---------------------------------+
113	
114	-------------------------------------------------------------------------------
115	
116	NAME      rev ADDR type chip    Description
117	JOYTEST       036   W   Denise  Write to all 4  joystick-mouse counters at once.
118	
119	                  Mouse counter write test data:
120	     BIT#  15  14  13  12  11  10  09  08     07  06  05  04  03  02  01  00
121	  JOYxDAT  Y7  Y6  Y5  Y4  Y3  Y2  xx  xx     X7  X6  X5  X4  X3  X2  xx  xx
122	  JOYxDAT  Y7  Y6  Y5  Y4  Y3  Y2  xx  xx     X7  X6  X5  X4  X3  X2  xx  xx
123	
124	-------------------------------------------------------------------------------
125	
126	NAME    rev ADDR type chip   Description
127	POT0DAT  h  012   R   Paula  Pot counter data left pair (vert, horiz)
128	POT1DAT  h  014   R   Paula  Pot counter data right pair (vert,horiz)
129	
130	        These addresses each read a pair of 8 bit pot counters.
131	        (4 counters total). The bit assignment for both
132	        addresses is shown below. The counters are stopped by signals
133	        from 2 controller connectors (left-right) with 2 pins each.
134	
135	  BIT#  15  14  13  12  11  10  09  08     07  06  05  04  03  02  01  00
136	 RIGHT  Y7  Y6  Y5  Y4  Y3  Y2  Y1  Y0     X7  X6  X5  X4  X3  X2  X1  X0
137	  LEFT  Y7  Y6  Y5  Y4  Y3  Y2  Y1  Y0     X7  X6  X5  X4  X3  X2  X1  X0
138	
139	         +--------------------------+-------+
140	         | CONNECTORS               | PAULA |
141	         +-------+------+-----+-----+-------+
142	         | Loc.  | Dir. | Sym | pin | pin   |
143	         +-------+------+-----+-----+-------+
144	         | RIGHT | Y    | RX  | 9   | 33    |
145	         | RIGHT | X    | RX  | 5   | 32    |
146	         | LEFT  | Y    | LY  | 9   | 36    |
147	         | LEFT  | X    | LX  | 5   | 35    |
148	         +-------+------+-----+-----+-------+
149	
150	         With normal (NTSC or PAL) horiz. line rate, the pots will
151	         give a full scale (FF) reading with about 500kohms in one
152	         frame time. With proportionally faster horiz line times,
153	         the counters will count proportionally faster.
154	         This should be noted when doing variable beam displays.
155	
156	-------------------------------------------------------------------------------
157	
158	NAME   rev ADDR type chip   Description
159	POTGO      034   W   Paula  Pot port (4 bit) bi-direction and data, and pot counter start.
160	
161	-------------------------------------------------------------------------------
162	
163	NAME   rev ADDR type chip   Description
164	POTINP     016   R   Paula  Pot pin data read
165	
166	        This register controls a 4 bit bi-direction I/O port
167	        that shares the same 4 pins as the 4 pot counters above.
168	
169	         +-------+----------+---------------------------------------------+
170	         | BIT#  | FUNCTION | DESCRIPTION                                 |
171	         +-------+----------+---------------------------------------------+
172	         | 15    | OUTRY    | Output enable for Paula pin 33              |
173	         | 14    | DATRY    | I/O data Paula pin 33                       |
174	         | 13    | OUTRX    | Output enable for Paula pin 32              |
175	         | 12    | DATRX    | I/O data Paula pin 32                       |
176	         | 11    | OUTLY    | Out put enable for Paula pin 36             |
177	         | 10    | DATLY    | I/O data Paula pin 36                       |
178	         | 09    | OUTLX    | Output enable for Paula pin 35              |
179	         | 08    | DATLX    | I/O data  Paula pin 35                      |
180	         | 07-01 |   X      | Not used                                    |
181	         | 00    | START    | Start pots (dump capacitors,start counters) |
182	         +-------+----------+---------------------------------------------+
183	
184	-------------------------------------------------------------------------------
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