Based on kernel version 4.16.1. Page generated on 2018-04-09 11:52 EST.
1 * I2C controller embedded in STMicroelectronics STM32 I2C platform 2 3 Required properties : 4 - compatible : Must be one of the following 5 - "st,stm32f4-i2c" 6 - "st,stm32f7-i2c" 7 - reg : Offset and length of the register set for the device 8 - interrupts : Must contain the interrupt id for I2C event and then the 9 interrupt id for I2C error. 10 - resets: Must contain the phandle to the reset controller. 11 - clocks: Must contain the input clock of the I2C instance. 12 - A pinctrl state named "default" must be defined to set pins in mode of 13 operation for I2C transfer 14 - #address-cells = <1>; 15 - #size-cells = <0>; 16 17 Optional properties : 18 - clock-frequency : Desired I2C bus clock frequency in Hz. If not specified, 19 the default 100 kHz frequency will be used. 20 For STM32F4 SoC Standard-mode and Fast-mode are supported, possible values are 21 100000 and 400000. 22 For STM32F7 SoC, Standard-mode, Fast-mode and Fast-mode Plus are supported, 23 possible values are 100000, 400000 and 1000000. 24 - i2c-scl-rising-time-ns : Only for STM32F7, I2C SCL Rising time for the board 25 (default: 25) 26 - i2c-scl-falling-time-ns : Only for STM32F7, I2C SCL Falling time for the board 27 (default: 10) 28 I2C Timings are derived from these 2 values 29 30 Example : 31 32 i2c@40005400 { 33 compatible = "st,stm32f4-i2c"; 34 #address-cells = <1>; 35 #size-cells = <0>; 36 reg = <0x40005400 0x400>; 37 interrupts = <31>, 38 <32>; 39 resets = <&rcc 277>; 40 clocks = <&rcc 0 149>; 41 pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>; 42 pinctrl-names = "default"; 43 }; 44 45 i2c@40005400 { 46 compatible = "st,stm32f7-i2c"; 47 #address-cells = <1>; 48 #size-cells = <0>; 49 reg = <0x40005400 0x400>; 50 interrupts = <31>, 51 <32>; 52 resets = <&rcc STM32F7_APB1_RESET(I2C1)>; 53 clocks = <&rcc 1 CLK_I2C1>; 54 pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>; 55 pinctrl-names = "default"; 56 };