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Documentation / devicetree / bindings / i2c / i2c-imx.txt




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Based on kernel version 4.7.2. Page generated on 2016-08-22 22:41 EST.

1	* Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
2	
3	Required properties:
4	- compatible :
5	  - "fsl,imx1-i2c" for I2C compatible with the one integrated on i.MX1 SoC
6	  - "fsl,imx21-i2c" for I2C compatible with the one integrated on i.MX21 SoC
7	  - "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
8	- reg : Should contain I2C/HS-I2C registers location and length
9	- interrupts : Should contain I2C/HS-I2C interrupt
10	- clocks : Should contain the I2C/HS-I2C clock specifier
11	
12	Optional properties:
13	- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
14	  The absence of the property indicates the default frequency 100 kHz.
15	- dmas: A list of two dma specifiers, one for each entry in dma-names.
16	- dma-names: should contain "tx" and "rx".
17	- scl-gpios: specify the gpio related to SCL pin
18	- sda-gpios: specify the gpio related to SDA pin
19	- pinctrl: add extra pinctrl to configure i2c pins to gpio function for i2c
20	  bus recovery, call it "gpio" state
21	
22	Examples:
23	
24	i2c@83fc4000 { /* I2C2 on i.MX51 */
25		compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
26		reg = <0x83fc4000 0x4000>;
27		interrupts = <63>;
28	};
29	
30	i2c@70038000 { /* HS-I2C on i.MX51 */
31		compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
32		reg = <0x70038000 0x4000>;
33		interrupts = <64>;
34		clock-frequency = <400000>;
35	};
36	
37	i2c0: i2c@40066000 { /* i2c0 on vf610 */
38		compatible = "fsl,vf610-i2c";
39		reg = <0x40066000 0x1000>;
40		interrupts =<0 71 0x04>;
41		dmas = <&edma0 0 50>,
42			<&edma0 0 51>;
43		dma-names = "rx","tx";
44		pinctrl-names = "default", "gpio";
45		pinctrl-0 = <&pinctrl_i2c1>;
46		pinctrl-1 = <&pinctrl_i2c1_gpio>;
47		scl-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
48		sda-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
49	};
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