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Documentation / devicetree / bindings / net / cpsw.txt




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Based on kernel version 3.19. Page generated on 2015-02-13 21:18 EST.

1	TI SoC Ethernet Switch Controller Device Tree Bindings
2	------------------------------------------------------
3	
4	Required properties:
5	- compatible		: Should be "ti,cpsw"
6	- reg			: physical base address and size of the cpsw
7				  registers map
8	- interrupts		: property with a value describing the interrupt
9				  number
10	- interrupt-parent	: The parent interrupt controller
11	- cpdma_channels 	: Specifies number of channels in CPDMA
12	- ale_entries		: Specifies No of entries ALE can hold
13	- bd_ram_size		: Specifies internal descriptor RAM size
14	- rx_descs		: Specifies number of Rx descriptors
15	- mac_control		: Specifies Default MAC control register content
16				  for the specific platform
17	- slaves		: Specifies number for slaves
18	- active_slave		: Specifies the slave to use for time stamping,
19				  ethtool and SIOCGMIIPHY
20	- cpts_clock_mult	: Numerator to convert input clock ticks into nanoseconds
21	- cpts_clock_shift	: Denominator to convert input clock ticks into nanoseconds
22	
23	Optional properties:
24	- ti,hwmods		: Must be "cpgmac0"
25	- no_bd_ram		: Must be 0 or 1
26	- dual_emac		: Specifies Switch to act as Dual EMAC
27	- syscon		: Phandle to the system control device node, which is
28				  the control module device of the am33x
29	
30	Slave Properties:
31	Required properties:
32	- phy_id		: Specifies slave phy id
33	- phy-mode		: See ethernet.txt file in the same directory
34	
35	Optional properties:
36	- dual_emac_res_vlan	: Specifies VID to be used to segregate the ports
37	- mac-address		: See ethernet.txt file in the same directory
38	
39	Note: "ti,hwmods" field is used to fetch the base address and irq
40	resources from TI, omap hwmod data base during device registration.
41	Future plan is to migrate hwmod data base contents into device tree
42	blob so that, all the required data will be used from device tree dts
43	file.
44	
45	Examples:
46	
47		mac: ethernet@4A100000 {
48			compatible = "ti,cpsw";
49			reg = <0x4A100000 0x1000>;
50			interrupts = <55 0x4>;
51			interrupt-parent = <&intc>;
52			cpdma_channels = <8>;
53			ale_entries = <1024>;
54			bd_ram_size = <0x2000>;
55			no_bd_ram = <0>;
56			rx_descs = <64>;
57			mac_control = <0x20>;
58			slaves = <2>;
59			active_slave = <0>;
60			cpts_clock_mult = <0x80000000>;
61			cpts_clock_shift = <29>;
62			syscon = <&cm>;
63			cpsw_emac0: slave@0 {
64				phy_id = <&davinci_mdio>, <0>;
65				phy-mode = "rgmii-txid";
66				/* Filled in by U-Boot */
67				mac-address = [ 00 00 00 00 00 00 ];
68			};
69			cpsw_emac1: slave@1 {
70				phy_id = <&davinci_mdio>, <1>;
71				phy-mode = "rgmii-txid";
72				/* Filled in by U-Boot */
73				mac-address = [ 00 00 00 00 00 00 ];
74			};
75		};
76	
77	(or)
78		mac: ethernet@4A100000 {
79			compatible = "ti,cpsw";
80			ti,hwmods = "cpgmac0";
81			cpdma_channels = <8>;
82			ale_entries = <1024>;
83			bd_ram_size = <0x2000>;
84			no_bd_ram = <0>;
85			rx_descs = <64>;
86			mac_control = <0x20>;
87			slaves = <2>;
88			active_slave = <0>;
89			cpts_clock_mult = <0x80000000>;
90			cpts_clock_shift = <29>;
91			syscon = <&cm>;
92			cpsw_emac0: slave@0 {
93				phy_id = <&davinci_mdio>, <0>;
94				phy-mode = "rgmii-txid";
95				/* Filled in by U-Boot */
96				mac-address = [ 00 00 00 00 00 00 ];
97			};
98			cpsw_emac1: slave@1 {
99				phy_id = <&davinci_mdio>, <1>;
100				phy-mode = "rgmii-txid";
101				/* Filled in by U-Boot */
102				mac-address = [ 00 00 00 00 00 00 ];
103			};
104		};
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