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Documentation / devicetree / bindings / net / stmmac.txt




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Based on kernel version 4.1. Page generated on 2015-06-28 12:10 EST.

1	* STMicroelectronics 10/100/1000 Ethernet driver (GMAC)
2	
3	Required properties:
4	- compatible: Should be "snps,dwmac-<ip_version>" "snps,dwmac"
5		For backwards compatibility: "st,spear600-gmac" is also supported.
6	- reg: Address and length of the register set for the device
7	- interrupt-parent: Should be the phandle for the interrupt controller
8	  that services interrupts for this device
9	- interrupts: Should contain the STMMAC interrupts
10	- interrupt-names: Should contain the interrupt names "macirq"
11	  "eth_wake_irq" if this interrupt is supported in the "interrupts"
12	  property
13	- phy-mode: See ethernet.txt file in the same directory.
14	- snps,reset-gpio 	gpio number for phy reset.
15	- snps,reset-active-low boolean flag to indicate if phy reset is active low.
16	- snps,reset-delays-us  is triplet of delays
17		The 1st cell is reset pre-delay in micro seconds.
18		The 2nd cell is reset pulse in micro seconds.
19		The 3rd cell is reset post-delay in micro seconds.
20	- snps,pbl		Programmable Burst Length
21	- snps,fixed-burst	Program the DMA to use the fixed burst mode
22	- snps,mixed-burst	Program the DMA to use the mixed burst mode
23	- snps,force_thresh_dma_mode	Force DMA to use the threshold mode for
24					both tx and rx
25	- snps,force_sf_dma_mode	Force DMA to use the Store and Forward
26					mode for both tx and rx. This flag is
27					ignored if force_thresh_dma_mode is set.
28	- snps,multicast-filter-bins:	Number of multicast filter hash bins
29					supported by this device instance
30	- snps,perfect-filter-entries:	Number of perfect filter entries supported
31					by this device instance
32	
33	Optional properties:
34	- resets: Should contain a phandle to the STMMAC reset signal, if any
35	- reset-names: Should contain the reset signal name "stmmaceth", if a
36		reset phandle is given
37	- max-frame-size: See ethernet.txt file in the same directory
38	- clocks: If present, the first clock should be the GMAC main clock and
39	  the second clock should be peripheral's register interface clock. Further
40	  clocks may be specified in derived bindings.
41	- clock-names: One name for each entry in the clocks property, the
42	  first one should be "stmmaceth" and the second one should be "pclk".
43	- clk_ptp_ref: this is the PTP reference clock; in case of the PTP is
44	  available this clock is used for programming the Timestamp Addend Register.
45	  If not passed then the system clock will be used and this is fine on some
46	  platforms.
47	- snps,burst_len: The AXI burst lenth value of the AXI BUS MODE register.
48	- tx-fifo-depth: See ethernet.txt file in the same directory
49	- rx-fifo-depth: See ethernet.txt file in the same directory
50	
51	Examples:
52	
53		gmac0: ethernet@e0800000 {
54			compatible = "st,spear600-gmac";
55			reg = <0xe0800000 0x8000>;
56			interrupt-parent = <&vic1>;
57			interrupts = <24 23>;
58			interrupt-names = "macirq", "eth_wake_irq";
59			mac-address = [000000000000]; /* Filled in by U-Boot */
60			max-frame-size = <3800>;
61			phy-mode = "gmii";
62			snps,multicast-filter-bins = <256>;
63			snps,perfect-filter-entries = <128>;
64			rx-fifo-depth = <16384>;
65			tx-fifo-depth = <16384>;
66			clocks = <&clock>;
67			clock-names = "stmmaceth";
68		};
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