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Documentation / devicetree / bindings / pinctrl / samsung-pinctrl.txt




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Based on kernel version 3.19. Page generated on 2015-02-13 21:18 EST.

1	Samsung GPIO and Pin Mux/Config controller
2	
3	Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
4	controller. It controls the input/output settings on the available pads/pins
5	and also provides ability to multiplex and configure the output of various
6	on-chip controllers onto these pads.
7	
8	Required Properties:
9	- compatible: should be one of the following.
10	  - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11	  - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12	  - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13	  - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14	  - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15	  - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
16	  - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
17	  - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
18	  - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
19	  - "samsung,exynos5260-pinctrl": for Exynos5260 compatible pin-controller.
20	  - "samsung,exynos5420-pinctrl": for Exynos5420 compatible pin-controller.
21	  - "samsung,exynos7-pinctrl": for Exynos7 compatible pin-controller.
22	
23	- reg: Base address of the pin controller hardware module and length of
24	  the address space it occupies.
25	
26	- Pin banks as child nodes: Pin banks of the controller are represented by child
27	  nodes of the controller node. Bank name is taken from name of the node. Each
28	  bank node must contain following properties:
29	
30	  - gpio-controller: identifies the node as a gpio controller and pin bank.
31	  - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
32	    binding is used, the amount of cells must be specified as 2. See the below
33	    mentioned gpio binding representation for description of particular cells.
34	
35		Eg: <&gpx2 6 0>
36		<[phandle of the gpio controller node]
37		[pin number within the gpio controller]
38		[flags]>
39	
40		Values for gpio specifier:
41		- Pin number: is a value between 0 to 7.
42		- Flags: 0 - Active High
43			 1 - Active Low
44	
45	- Pin mux/config groups as child nodes: The pin mux (selecting pin function
46	  mode) and pin config (pull up/down, driver strength) settings are represented
47	  as child nodes of the pin-controller node. There should be atleast one
48	  child node and there is no limit on the count of these child nodes. It is
49	  also possible for a child node to consist of several further child nodes
50	  to allow grouping multiple pinctrl groups into one. The format of second
51	  level child nodes is exactly the same as for first level ones and is
52	  described below.
53	
54	  The child node should contain a list of pin(s) on which a particular pin
55	  function selection or pin configuration (or both) have to applied. This
56	  list of pins is specified using the property name "samsung,pins". There
57	  should be atleast one pin specfied for this property and there is no upper
58	  limit on the count of pins that can be specified. The pins are specified
59	  using pin names which are derived from the hardware manual of the SoC. As
60	  an example, the pins in GPA0 bank of the pin controller can be represented
61	  as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
62	  The format of the pin names should be (as per the hardware manual)
63	  "[pin bank name]-[pin number within the bank]".
64	
65	  The pin function selection that should be applied on the pins listed in the
66	  child node is specified using the "samsung,pin-function" property. The value
67	  of this property that should be applied to each of the pins listed in the
68	  "samsung,pins" property should be picked from the hardware manual of the SoC
69	  for the specified pin group. This property is optional in the child node if
70	  no specific function selection is desired for the pins listed in the child
71	  node. The value of this property is used as-is to program the pin-controller
72	  function selector register of the pin-bank.
73	
74	  The child node can also optionally specify one or more of the pin
75	  configuration that should be applied on all the pins listed in the
76	  "samsung,pins" property of the child node. The following pin configuration
77	  properties are supported.
78	
79	  - samsung,pin-val: Initial value of pin output buffer.
80	  - samsung,pin-pud: Pull up/down configuration.
81	  - samsung,pin-drv: Drive strength configuration.
82	  - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
83	  - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
84	
85	  The values specified by these config properties should be derived from the
86	  hardware manual and these values are programmed as-is into the pin
87	  pull up/down and driver strength register of the pin-controller.
88	
89	  Note: A child should include atleast a pin function selection property or
90	  pin configuration property (one or more) or both.
91	
92	  The client nodes that require a particular pin function selection and/or
93	  pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
94	  file.
95	
96	External GPIO and Wakeup Interrupts:
97	
98	The controller supports two types of external interrupts over gpio. The first
99	is the external gpio interrupt and second is the external wakeup interrupts.
100	The difference between the two is that the external wakeup interrupts can be
101	used as system wakeup events.
102	
103	A. External GPIO Interrupts: For supporting external gpio interrupts, the
104	   following properties should be specified in the pin-controller device node.
105	
106	   - interrupt-parent: phandle of the interrupt parent to which the external
107	     GPIO interrupts are forwarded to.
108	   - interrupts: interrupt specifier for the controller. The format and value of
109	     the interrupt specifier depends on the interrupt parent for the controller.
110	
111	   In addition, following properties must be present in node of every bank
112	   of pins supporting GPIO interrupts:
113	
114	   - interrupt-controller: identifies the controller node as interrupt-parent.
115	   - #interrupt-cells: the value of this property should be 2.
116	     - First Cell: represents the external gpio interrupt number local to the
117	       external gpio interrupt space of the controller.
118	     - Second Cell: flags to identify the type of the interrupt
119	       - 1 = rising edge triggered
120	       - 2 = falling edge triggered
121	       - 3 = rising and falling edge triggered
122	       - 4 = high level triggered
123	       - 8 = low level triggered
124	
125	B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
126	   child node representing the external wakeup interrupt controller should be
127	   included in the pin-controller device node. This child node should include
128	   the following properties.
129	
130	   - compatible: identifies the type of the external wakeup interrupt controller
131	     The possible values are:
132	     - samsung,s3c2410-wakeup-eint: represents wakeup interrupt controller
133	       found on Samsung S3C24xx SoCs except S3C2412 and S3C2413,
134	     - samsung,s3c2412-wakeup-eint: represents wakeup interrupt controller
135	       found on Samsung S3C2412 and S3C2413 SoCs,
136	     - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller
137	       found on Samsung S3C64xx SoCs,
138	     - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
139	       found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs.
140	     - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller
141	       found on Samsung Exynos7 SoC.
142	   - interrupt-parent: phandle of the interrupt parent to which the external
143	     wakeup interrupts are forwarded to.
144	   - interrupts: interrupt used by multiplexed wakeup interrupts.
145	
146	   In addition, following properties must be present in node of every bank
147	   of pins supporting wake-up interrupts:
148	
149	   - interrupt-controller: identifies the node as interrupt-parent.
150	   - #interrupt-cells: the value of this property should be 2
151	     - First Cell: represents the external wakeup interrupt number local to
152	       the external wakeup interrupt space of the controller.
153	     - Second Cell: flags to identify the type of the interrupt
154	       - 1 = rising edge triggered
155	       - 2 = falling edge triggered
156	       - 3 = rising and falling edge triggered
157	       - 4 = high level triggered
158	       - 8 = low level triggered
159	
160	   Node of every bank of pins supporting direct wake-up interrupts (without
161	   multiplexing) must contain following properties:
162	
163	   - interrupt-parent: phandle of the interrupt parent to which the external
164	     wakeup interrupts are forwarded to.
165	   - interrupts: interrupts of the interrupt parent which are used for external
166	     wakeup interrupts from pins of the bank, must contain interrupts for all
167	     pins of the bank.
168	
169	Aliases:
170	
171	All the pin controller nodes should be represented in the aliases node using
172	the following format 'pinctrl{n}' where n is a unique number for the alias.
173	
174	Example: A pin-controller node with pin banks:
175	
176		pinctrl_0: pinctrl@11400000 {
177			compatible = "samsung,exynos4210-pinctrl";
178			reg = <0x11400000 0x1000>;
179			interrupts = <0 47 0>;
180	
181			/* ... */
182	
183			/* Pin bank without external interrupts */
184			gpy0: gpy0 {
185				gpio-controller;
186				#gpio-cells = <2>;
187			};
188	
189			/* ... */
190	
191			/* Pin bank with external GPIO or muxed wake-up interrupts */
192			gpj0: gpj0 {
193				gpio-controller;
194				#gpio-cells = <2>;
195	
196				interrupt-controller;
197				#interrupt-cells = <2>;
198			};
199	
200			/* ... */
201	
202			/* Pin bank with external direct wake-up interrupts */
203			gpx0: gpx0 {
204				gpio-controller;
205				#gpio-cells = <2>;
206	
207				interrupt-controller;
208				interrupt-parent = <&gic>;
209				interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
210					     <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
211				#interrupt-cells = <2>;
212			};
213	
214			/* ... */
215		};
216	
217	Example 1: A pin-controller node with pin groups.
218	
219		pinctrl_0: pinctrl@11400000 {
220			compatible = "samsung,exynos4210-pinctrl";
221			reg = <0x11400000 0x1000>;
222			interrupts = <0 47 0>;
223	
224			/* ... */
225	
226			uart0_data: uart0-data {
227				samsung,pins = "gpa0-0", "gpa0-1";
228				samsung,pin-function = <2>;
229				samsung,pin-pud = <0>;
230				samsung,pin-drv = <0>;
231			};
232	
233			uart0_fctl: uart0-fctl {
234				samsung,pins = "gpa0-2", "gpa0-3";
235				samsung,pin-function = <2>;
236				samsung,pin-pud = <0>;
237				samsung,pin-drv = <0>;
238			};
239	
240			uart1_data: uart1-data {
241				samsung,pins = "gpa0-4", "gpa0-5";
242				samsung,pin-function = <2>;
243				samsung,pin-pud = <0>;
244				samsung,pin-drv = <0>;
245			};
246	
247			uart1_fctl: uart1-fctl {
248				samsung,pins = "gpa0-6", "gpa0-7";
249				samsung,pin-function = <2>;
250				samsung,pin-pud = <0>;
251				samsung,pin-drv = <0>;
252			};
253	
254			i2c2_bus: i2c2-bus {
255				samsung,pins = "gpa0-6", "gpa0-7";
256				samsung,pin-function = <3>;
257				samsung,pin-pud = <3>;
258				samsung,pin-drv = <0>;
259			};
260	
261			sd4_bus8: sd4-bus-width8 {
262				part-1 {
263					samsung,pins = "gpk0-3", "gpk0-4",
264							"gpk0-5", "gpk0-6";
265					samsung,pin-function = <3>;
266					samsung,pin-pud = <3>;
267					samsung,pin-drv = <3>;
268				};
269				part-2 {
270					samsung,pins = "gpk1-3", "gpk1-4",
271							"gpk1-5", "gpk1-6";
272					samsung,pin-function = <4>;
273					samsung,pin-pud = <4>;
274					samsung,pin-drv = <3>;
275				};
276			};
277		};
278	
279	Example 2: A pin-controller node with external wakeup interrupt controller node.
280	
281		pinctrl_1: pinctrl@11000000 {
282			compatible = "samsung,exynos4210-pinctrl";
283			reg = <0x11000000 0x1000>;
284			interrupts = <0 46 0>
285	
286			/* ... */
287	
288			wakeup-interrupt-controller {
289				compatible = "samsung,exynos4210-wakeup-eint";
290				interrupt-parent = <&gic>;
291				interrupts = <0 32 0>;
292			};
293		};
294	
295	Example 3: A uart client node that supports 'default' and 'flow-control' states.
296	
297		uart@13800000 {
298			compatible = "samsung,exynos4210-uart";
299			reg = <0x13800000 0x100>;
300			interrupts = <0 52 0>;
301			pinctrl-names = "default", "flow-control;
302			pinctrl-0 = <&uart0_data>;
303			pinctrl-1 = <&uart0_data &uart0_fctl>;
304		};
305	
306	Example 4: Set up the default pin state for uart controller.
307	
308		static int s3c24xx_serial_probe(struct platform_device *pdev) {
309			struct pinctrl *pinctrl;
310	
311			/* ... */
312	
313			pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
314		}
315	
316	Example 5: A display port client node that supports 'default' pinctrl state
317		   and gpio binding.
318	
319		display-port-controller {
320			/* ... */
321	
322			samsung,hpd-gpio = <&gpx2 6 0>;
323			pinctrl-names = "default";
324			pinctrl-0 = <&dp_hpd>;
325		};
326	
327	Example 6: Request the gpio for display port controller
328	
329		static int exynos_dp_probe(struct platform_device *pdev)
330		{
331			int hpd_gpio, ret;
332			struct device *dev = &pdev->dev;
333			struct device_node *dp_node = dev->of_node;
334	
335			/* ... */
336	
337			hpd_gpio = of_get_named_gpio(dp_node, "samsung,hpd-gpio", 0);
338	
339			/* ... */
340	
341			ret = devm_gpio_request_one(&pdev->dev, hpd_gpio, GPIOF_IN,
342						    "hpd_gpio");
343			/* ... */
344		}
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