Documentation / devicetree / bindings / pinctrl / samsung-pinctrl.txt

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Based on kernel version 3.9. Page generated on 2013-05-02 23:00 EST.

	Samsung GPIO and Pin Mux/Config controller
	
	Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
	controller. It controls the input/output settings on the available pads/pins
	and also provides ability to multiplex and configure the output of various
	on-chip controllers onto these pads.
	
	Required Properties:
	- compatible: should be one of the following.
	  - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller.
	  - "samsung,exynos4x12-pinctrl": for Exynos4x12 compatible pin-controller.
	  - "samsung,exynos5250-pinctrl": for Exynos5250 compatible pin-controller.
	
	- reg: Base address of the pin controller hardware module and length of
	  the address space it occupies.
	
	- Pin banks as child nodes: Pin banks of the controller are represented by child
	  nodes of the controller node. Bank name is taken from name of the node. Each
	  bank node must contain following properties:
	
	  - gpio-controller: identifies the node as a gpio controller and pin bank.
	  - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
	    binding is used, the amount of cells must be specified as 2. See generic
	    GPIO binding documentation for description of particular cells.
	
	- Pin mux/config groups as child nodes: The pin mux (selecting pin function
	  mode) and pin config (pull up/down, driver strength) settings are represented
	  as child nodes of the pin-controller node. There should be atleast one
	  child node and there is no limit on the count of these child nodes.
	
	  The child node should contain a list of pin(s) on which a particular pin
	  function selection or pin configuration (or both) have to applied. This
	  list of pins is specified using the property name "samsung,pins". There
	  should be atleast one pin specfied for this property and there is no upper
	  limit on the count of pins that can be specified. The pins are specified
	  using pin names which are derived from the hardware manual of the SoC. As
	  an example, the pins in GPA0 bank of the pin controller can be represented
	  as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
	  The format of the pin names should be (as per the hardware manual)
	  "[pin bank name]-[pin number within the bank]".
	
	  The pin function selection that should be applied on the pins listed in the
	  child node is specified using the "samsung,pin-function" property. The value
	  of this property that should be applied to each of the pins listed in the
	  "samsung,pins" property should be picked from the hardware manual of the SoC
	  for the specified pin group. This property is optional in the child node if
	  no specific function selection is desired for the pins listed in the child
	  node. The value of this property is used as-is to program the pin-controller
	  function selector register of the pin-bank.
	
	  The child node can also optionally specify one or more of the pin
	  configuration that should be applied on all the pins listed in the
	  "samsung,pins" property of the child node. The following pin configuration
	  properties are supported.
	
	  - samsung,pin-pud: Pull up/down configuration.
	  - samsung,pin-drv: Drive strength configuration.
	  - samsung,pin-pud-pdn: Pull up/down configuration in power down mode.
	  - samsung,pin-drv-pdn: Drive strength configuration in power down mode.
	
	  The values specified by these config properties should be derived from the
	  hardware manual and these values are programmed as-is into the pin
	  pull up/down and driver strength register of the pin-controller.
	
	  Note: A child should include atleast a pin function selection property or
	  pin configuration property (one or more) or both.
	
	  The client nodes that require a particular pin function selection and/or
	  pin configuration should use the bindings listed in the "pinctrl-bindings.txt"
	  file.
	
	External GPIO and Wakeup Interrupts:
	
	The controller supports two types of external interrupts over gpio. The first
	is the external gpio interrupt and second is the external wakeup interrupts.
	The difference between the two is that the external wakeup interrupts can be
	used as system wakeup events.
	
	A. External GPIO Interrupts: For supporting external gpio interrupts, the
	   following properties should be specified in the pin-controller device node.
	
	   - interrupt-parent: phandle of the interrupt parent to which the external
	     GPIO interrupts are forwarded to.
	   - interrupts: interrupt specifier for the controller. The format and value of
	     the interrupt specifier depends on the interrupt parent for the controller.
	
	   In addition, following properties must be present in node of every bank
	   of pins supporting GPIO interrupts:
	
	   - interrupt-controller: identifies the controller node as interrupt-parent.
	   - #interrupt-cells: the value of this property should be 2.
	     - First Cell: represents the external gpio interrupt number local to the
	       external gpio interrupt space of the controller.
	     - Second Cell: flags to identify the type of the interrupt
	       - 1 = rising edge triggered
	       - 2 = falling edge triggered
	       - 3 = rising and falling edge triggered
	       - 4 = high level triggered
	       - 8 = low level triggered
	
	B. External Wakeup Interrupts: For supporting external wakeup interrupts, a
	   child node representing the external wakeup interrupt controller should be
	   included in the pin-controller device node. This child node should include
	   the following properties.
	
	   - compatible: identifies the type of the external wakeup interrupt controller
	     The possible values are:
	     - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller
	       found on Samsung Exynos4210 SoC.
	   - interrupt-parent: phandle of the interrupt parent to which the external
	     wakeup interrupts are forwarded to.
	   - interrupts: interrupt used by multiplexed wakeup interrupts.
	
	   In addition, following properties must be present in node of every bank
	   of pins supporting wake-up interrupts:
	
	   - interrupt-controller: identifies the node as interrupt-parent.
	   - #interrupt-cells: the value of this property should be 2
	     - First Cell: represents the external wakeup interrupt number local to
	       the external wakeup interrupt space of the controller.
	     - Second Cell: flags to identify the type of the interrupt
	       - 1 = rising edge triggered
	       - 2 = falling edge triggered
	       - 3 = rising and falling edge triggered
	       - 4 = high level triggered
	       - 8 = low level triggered
	
	   Node of every bank of pins supporting direct wake-up interrupts (without
	   multiplexing) must contain following properties:
	
	   - interrupt-parent: phandle of the interrupt parent to which the external
	     wakeup interrupts are forwarded to.
	   - interrupts: interrupts of the interrupt parent which are used for external
	     wakeup interrupts from pins of the bank, must contain interrupts for all
	     pins of the bank.
	
	Aliases:
	
	All the pin controller nodes should be represented in the aliases node using
	the following format 'pinctrl{n}' where n is a unique number for the alias.
	
	Example: A pin-controller node with pin banks:
	
		pinctrl_0: pinctrl@11400000 {
			compatible = "samsung,exynos4210-pinctrl";
			reg = <0x11400000 0x1000>;
			interrupts = <0 47 0>;
	
			/* ... */
	
			/* Pin bank without external interrupts */
			gpy0: gpy0 {
				gpio-controller;
				#gpio-cells = <2>;
			};
	
			/* ... */
	
			/* Pin bank with external GPIO or muxed wake-up interrupts */
			gpj0: gpj0 {
				gpio-controller;
				#gpio-cells = <2>;
	
				interrupt-controller;
				#interrupt-cells = <2>;
			};
	
			/* ... */
	
			/* Pin bank with external direct wake-up interrupts */
			gpx0: gpx0 {
				gpio-controller;
				#gpio-cells = <2>;
	
				interrupt-controller;
				interrupt-parent = <&gic>;
				interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
					     <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
				#interrupt-cells = <2>;
			};
	
			/* ... */
		};
	
	Example 1: A pin-controller node with pin groups.
	
		pinctrl_0: pinctrl@11400000 {
			compatible = "samsung,exynos4210-pinctrl";
			reg = <0x11400000 0x1000>;
			interrupts = <0 47 0>;
	
			/* ... */
	
			uart0_data: uart0-data {
				samsung,pins = "gpa0-0", "gpa0-1";
				samsung,pin-function = <2>;
				samsung,pin-pud = <0>;
				samsung,pin-drv = <0>;
			};
	
			uart0_fctl: uart0-fctl {
				samsung,pins = "gpa0-2", "gpa0-3";
				samsung,pin-function = <2>;
				samsung,pin-pud = <0>;
				samsung,pin-drv = <0>;
			};
	
			uart1_data: uart1-data {
				samsung,pins = "gpa0-4", "gpa0-5";
				samsung,pin-function = <2>;
				samsung,pin-pud = <0>;
				samsung,pin-drv = <0>;
			};
	
			uart1_fctl: uart1-fctl {
				samsung,pins = "gpa0-6", "gpa0-7";
				samsung,pin-function = <2>;
				samsung,pin-pud = <0>;
				samsung,pin-drv = <0>;
			};
	
			i2c2_bus: i2c2-bus {
				samsung,pins = "gpa0-6", "gpa0-7";
				samsung,pin-function = <3>;
				samsung,pin-pud = <3>;
				samsung,pin-drv = <0>;
			};
		};
	
	Example 2: A pin-controller node with external wakeup interrupt controller node.
	
		pinctrl_1: pinctrl@11000000 {
			compatible = "samsung,exynos4210-pinctrl";
			reg = <0x11000000 0x1000>;
			interrupts = <0 46 0>
	
			/* ... */
	
			wakeup-interrupt-controller {
				compatible = "samsung,exynos4210-wakeup-eint";
				interrupt-parent = <&gic>;
				interrupts = <0 32 0>;
			};
		};
	
	Example 3: A uart client node that supports 'default' and 'flow-control' states.
	
		uart@13800000 {
			compatible = "samsung,exynos4210-uart";
			reg = <0x13800000 0x100>;
			interrupts = <0 52 0>;
			pinctrl-names = "default", "flow-control;
			pinctrl-0 = <&uart0_data>;
			pinctrl-1 = <&uart0_data &uart0_fctl>;
		};
	
	Example 4: Set up the default pin state for uart controller.
	
		static int s3c24xx_serial_probe(struct platform_device *pdev) {
			struct pinctrl *pinctrl;
	
			/* ... */
	
			pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
		}

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