Documentation / devicetree / bindings / net / amlogic,gxl-mdio-mux.yaml


Based on kernel version 6.8. Page generated on 2024-03-11 21:26 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/amlogic,gxl-mdio-mux.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Amlogic GXL MDIO bus multiplexer

maintainers:
  - Jerome Brunet <jbrunet@baylibre.com>

description:
  This is a special case of a MDIO bus multiplexer. It allows to choose between
  the internal mdio bus leading to the embedded 10/100 PHY or the external
  MDIO bus on the Amlogic GXL SoC family.

allOf:
  - $ref: mdio-mux.yaml#

properties:
  compatible:
    const: amlogic,gxl-mdio-mux

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: ref

required:
  - compatible
  - reg
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    eth_phy_mux: mdio@558 {
      compatible = "amlogic,gxl-mdio-mux";
      reg = <0x558 0xc>;
      #address-cells = <1>;
      #size-cells = <0>;
      clocks = <&refclk>;
      clock-names = "ref";
      mdio-parent-bus = <&mdio0>;

      external_mdio: mdio@0 {
        reg = <0x0>;
        #address-cells = <1>;
        #size-cells = <0>;
      };

      internal_mdio: mdio@1 {
        reg = <0x1>;
        #address-cells = <1>;
        #size-cells = <0>;
      };
    };