Documentation / devicetree / bindings / net / renesas,ethertsn.yaml


Based on kernel version 6.8. Page generated on 2024-03-11 21:26 EST.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/renesas,ethertsn.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas Ethernet TSN End-station

maintainers:
  - Niklas Söderlund <niklas.soderlund@ragnatech.se>

description:
  The RTSN device provides Ethernet network using a 10 Mbps, 100 Mbps, or 1
  Gbps full-duplex link via MII/GMII/RMII/RGMII. Depending on the connected PHY.

allOf:
  - $ref: ethernet-controller.yaml#

properties:
  compatible:
    items:
      - enum:
          - renesas,r8a779g0-ethertsn       # R-Car V4H
      - const: renesas,rcar-gen4-ethertsn

  reg:
    items:
      - description: TSN End Station target
      - description: generalized Precision Time Protocol target

  reg-names:
    items:
      - const: tsnes
      - const: gptp

  interrupts:
    items:
      - description: TX data interrupt
      - description: RX data interrupt

  interrupt-names:
    items:
      - const: tx
      - const: rx

  clocks:
    maxItems: 1

  power-domains:
    maxItems: 1

  resets:
    maxItems: 1

  phy-mode:
    contains:
      enum:
        - mii
        - rgmii

  phy-handle:
    $ref: /schemas/types.yaml#/definitions/phandle
    description:
      Specifies a reference to a node representing a PHY device.

  rx-internal-delay-ps:
    enum: [0, 1800]
    default: 0

  tx-internal-delay-ps:
    enum: [0, 2000]
    default: 0
 
  '#address-cells':
    const: 1
 
  '#size-cells':
    const: 0

patternProperties:
  "^ethernet-phy@[0-9a-f]$":
    type: object
    $ref: ethernet-phy.yaml#
    unevaluatedProperties: false

required:
  - compatible
  - reg
  - reg-names
  - interrupts
  - interrupt-names
  - clocks
  - power-domains
  - resets
  - phy-mode
  - phy-handle
  - '#address-cells'
  - '#size-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/power/r8a779g0-sysc.h>
    #include <dt-bindings/gpio/gpio.h>
 
    tsn0: ethernet@e6460000 {
        compatible = "renesas,r8a779g0-ethertsn", "renesas,rcar-gen4-ethertsn";
        reg = <0xe6460000 0x7000>,
              <0xe6449000 0x500>;
        reg-names = "tsnes", "gptp";
        interrupts = <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
        interrupt-names = "tx", "rx";
        clocks = <&cpg CPG_MOD 2723>;
        power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
        resets = <&cpg 2723>;
 
        phy-mode = "rgmii";
        tx-internal-delay-ps = <2000>;
        phy-handle = <&phy3>;
 
        #address-cells = <1>;
        #size-cells = <0>;
 
        phy3: ethernet-phy@3 {
            compatible = "ethernet-phy-ieee802.3-c45";
            reg = <0>;
            interrupt-parent = <&gpio4>;
            interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
            reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
        };
    };