Documentation / devicetree / bindings / net / asix,ax88796c.yaml


Based on kernel version 6.8. Page generated on 2024-03-11 21:26 EST.

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/asix,ax88796c.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ASIX AX88796C SPI Ethernet Adapter

maintainers:
  - Ɓukasz Stelmach <l.stelmach@samsung.com>

description: |
  ASIX AX88796C is an Ethernet controller with a built in PHY. This
  describes SPI mode of the chip.
 
  The node for this driver must be a child node of an SPI controller,
  hence all mandatory properties described in
  ../spi/spi-controller.yaml must be specified.

allOf:
  - $ref: ethernet-controller.yaml#
  - $ref: /schemas/spi/spi-peripheral-props.yaml

properties:
  compatible:
    const: asix,ax88796c

  reg:
    maxItems: 1

  spi-max-frequency:
    maximum: 40000000

  interrupts:
    maxItems: 1

  reset-gpios:
    description:
      A GPIO line handling reset of the chip. As the line is active low,
      it should be marked GPIO_ACTIVE_LOW.
    maxItems: 1

  controller-data: true
  local-mac-address: true
  mac-address: true

required:
  - compatible
  - reg
  - spi-max-frequency
  - interrupts
  - reset-gpios

additionalProperties: false

examples:
  # Artik5 eval board
  - |
    #include <dt-bindings/interrupt-controller/irq.h>
    #include <dt-bindings/gpio/gpio.h>
    spi {
        #address-cells = <1>;
        #size-cells = <0>;
 
        ethernet@0 {
            compatible = "asix,ax88796c";
            reg = <0x0>;
            local-mac-address = [00 00 00 00 00 00]; /* Filled in by a bootloader */
            interrupt-parent = <&gpx2>;
            interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
            spi-max-frequency = <40000000>;
            reset-gpios = <&gpe0 2 GPIO_ACTIVE_LOW>;
        };
    };