Based on kernel version 4.16.1. Page generated on 2018-04-09 11:52 EST.
1 Atmel AT91 device tree bindings. 2 ================================ 3 4 Boards with a SoC of the Atmel AT91 or SMART family shall have the following 5 properties: 6 7 Required root node properties: 8 compatible: must be one of: 9 * "atmel,at91rm9200" 10 11 * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with 12 the specific SoC family or compatible: 13 o "atmel,at91sam9260" 14 o "atmel,at91sam9261" 15 o "atmel,at91sam9263" 16 o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific 17 SoC compatible: 18 - "atmel,at91sam9g15" 19 - "atmel,at91sam9g25" 20 - "atmel,at91sam9g35" 21 - "atmel,at91sam9x25" 22 - "atmel,at91sam9x35" 23 o "atmel,at91sam9g20" 24 o "atmel,at91sam9g45" 25 o "atmel,at91sam9n12" 26 o "atmel,at91sam9rl" 27 o "atmel,at91sam9xe" 28 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific 29 SoC family: 30 o "atmel,sama5d2" shall be extended with the specific SoC compatible: 31 - "atmel,sama5d27" 32 o "atmel,sama5d3" shall be extended with the specific SoC compatible: 33 - "atmel,sama5d31" 34 - "atmel,sama5d33" 35 - "atmel,sama5d34" 36 - "atmel,sama5d35" 37 - "atmel,sama5d36" 38 o "atmel,sama5d4" shall be extended with the specific SoC compatible: 39 - "atmel,sama5d41" 40 - "atmel,sama5d42" 41 - "atmel,sama5d43" 42 - "atmel,sama5d44" 43 44 * "atmel,samv7" for MCUs using a Cortex-M7, shall be extended with the specific 45 SoC family: 46 o "atmel,sams70" shall be extended with the specific MCU compatible: 47 - "atmel,sams70j19" 48 - "atmel,sams70j20" 49 - "atmel,sams70j21" 50 - "atmel,sams70n19" 51 - "atmel,sams70n20" 52 - "atmel,sams70n21" 53 - "atmel,sams70q19" 54 - "atmel,sams70q20" 55 - "atmel,sams70q21" 56 o "atmel,samv70" shall be extended with the specific MCU compatible: 57 - "atmel,samv70j19" 58 - "atmel,samv70j20" 59 - "atmel,samv70n19" 60 - "atmel,samv70n20" 61 - "atmel,samv70q19" 62 - "atmel,samv70q20" 63 o "atmel,samv71" shall be extended with the specific MCU compatible: 64 - "atmel,samv71j19" 65 - "atmel,samv71j20" 66 - "atmel,samv71j21" 67 - "atmel,samv71n19" 68 - "atmel,samv71n20" 69 - "atmel,samv71n21" 70 - "atmel,samv71q19" 71 - "atmel,samv71q20" 72 - "atmel,samv71q21" 73 74 Chipid required properties: 75 - compatible: Should be "atmel,sama5d2-chipid" 76 - reg : Should contain registers location and length 77 78 PIT Timer required properties: 79 - compatible: Should be "atmel,at91sam9260-pit" 80 - reg: Should contain registers location and length 81 - interrupts: Should contain interrupt for the PIT which is the IRQ line 82 shared across all System Controller members. 83 84 System Timer (ST) required properties: 85 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd" 86 - reg: Should contain registers location and length 87 - interrupts: Should contain interrupt for the ST which is the IRQ line 88 shared across all System Controller members. 89 - clocks: phandle to input clock. 90 Its subnodes can be: 91 - watchdog: compatible should be "atmel,at91rm9200-wdt" 92 93 RSTC Reset Controller required properties: 94 - compatible: Should be "atmel,<chip>-rstc". 95 <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3" 96 - reg: Should contain registers location and length 97 - clocks: phandle to input clock. 98 99 Example: 100 101 rstc@fffffd00 { 102 compatible = "atmel,at91sam9260-rstc"; 103 reg = <0xfffffd00 0x10>; 104 clocks = <&clk32k>; 105 }; 106 107 RAMC SDRAM/DDR Controller required properties: 108 - compatible: Should be "atmel,at91rm9200-sdramc", "syscon" 109 "atmel,at91sam9260-sdramc", 110 "atmel,at91sam9g45-ddramc", 111 "atmel,sama5d3-ddramc", 112 - reg: Should contain registers location and length 113 114 Examples: 115 116 ramc0: ramc@ffffe800 { 117 compatible = "atmel,at91sam9g45-ddramc"; 118 reg = <0xffffe800 0x200>; 119 }; 120 121 SHDWC Shutdown Controller 122 123 required properties: 124 - compatible: Should be "atmel,<chip>-shdwc". 125 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5". 126 - reg: Should contain registers location and length 127 - clocks: phandle to input clock. 128 129 optional properties: 130 - atmel,wakeup-mode: String, operation mode of the wakeup mode. 131 Supported values are: "none", "high", "low", "any". 132 - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf). 133 134 optional at91sam9260 properties: 135 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. 136 137 optional at91sam9rl properties: 138 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. 139 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up. 140 141 optional at91sam9x5 properties: 142 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up. 143 144 Example: 145 146 shdwc@fffffd10 { 147 compatible = "atmel,at91sam9260-shdwc"; 148 reg = <0xfffffd10 0x10>; 149 clocks = <&clk32k>; 150 }; 151 152 SHDWC SAMA5D2-Compatible Shutdown Controller 153 154 1) shdwc node 155 156 required properties: 157 - compatible: should be "atmel,sama5d2-shdwc". 158 - reg: should contain registers location and length 159 - clocks: phandle to input clock. 160 - #address-cells: should be one. The cell is the wake-up input index. 161 - #size-cells: should be zero. 162 163 optional properties: 164 165 - debounce-delay-us: minimum wake-up inputs debouncer period in 166 microseconds. It's usually a board-related property. 167 - atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up. 168 169 The node contains child nodes for each wake-up input that the platform uses. 170 171 2) input nodes 172 173 Wake-up input nodes are usually described in the "board" part of the Device 174 Tree. Note also that input 0 is linked to the wake-up pin and is frequently 175 used. 176 177 Required properties: 178 - reg: should contain the wake-up input index [0 - 15]. 179 180 Optional properties: 181 - atmel,wakeup-active-high: boolean, the corresponding wake-up input described 182 by the child, forces the wake-up of the core power supply on a high level. 183 The default is to be active low. 184 185 Example: 186 187 On the SoC side: 188 shdwc@f8048010 { 189 compatible = "atmel,sama5d2-shdwc"; 190 reg = <0xf8048010 0x10>; 191 clocks = <&clk32k>; 192 #address-cells = <1>; 193 #size-cells = <0>; 194 atmel,wakeup-rtc-timer; 195 }; 196 197 On the board side: 198 shdwc@f8048010 { 199 debounce-delay-us = <976>; 200 201 input@0 { 202 reg = <0>; 203 }; 204 205 input@1 { 206 reg = <1>; 207 atmel,wakeup-active-high; 208 }; 209 }; 210 211 Special Function Registers (SFR) 212 213 Special Function Registers (SFR) manage specific aspects of the integrated 214 memory, bridge implementations, processor and other functionality not controlled 215 elsewhere. 216 217 required properties: 218 - compatible: Should be "atmel,<chip>-sfr", "syscon" or 219 "atmel,<chip>-sfrbu", "syscon" 220 <chip> can be "sama5d3", "sama5d4" or "sama5d2". 221 - reg: Should contain registers location and length 222 223 sfr@f0038000 { 224 compatible = "atmel,sama5d3-sfr", "syscon"; 225 reg = <0xf0038000 0x60>; 226 }; 227 228 Security Module (SECUMOD) 229 230 The Security Module macrocell provides all necessary secure functions to avoid 231 voltage, temperature, frequency and mechanical attacks on the chip. It also 232 embeds secure memories that can be scrambled 233 234 required properties: 235 - compatible: Should be "atmel,<chip>-secumod", "syscon". 236 <chip> can be "sama5d2". 237 - reg: Should contain registers location and length 238 239 secumod@fc040000 { 240 compatible = "atmel,sama5d2-secumod", "syscon"; 241 reg = <0xfc040000 0x100>; 242 };