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Documentation / devicetree / bindings / arm / atmel-at91.txt




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Based on kernel version 4.1. Page generated on 2015-06-28 12:08 EST.

1	Atmel AT91 device tree bindings.
2	================================
3	
4	Boards with a SoC of the Atmel AT91 or SMART family shall have the following
5	properties:
6	
7	Required root node properties:
8	compatible: must be one of:
9	 * "atmel,at91rm9200"
10	
11	 * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
12	   the specific SoC family or compatible:
13	    o "atmel,at91sam9260"
14	    o "atmel,at91sam9261"
15	    o "atmel,at91sam9263"
16	    o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
17	      SoC compatible:
18	       - "atmel,at91sam9g15"
19	       - "atmel,at91sam9g25"
20	       - "atmel,at91sam9g35"
21	       - "atmel,at91sam9x25"
22	       - "atmel,at91sam9x35"
23	    o "atmel,at91sam9g20"
24	    o "atmel,at91sam9g45"
25	    o "atmel,at91sam9n12"
26	    o "atmel,at91sam9rl"
27	    o "atmel,at91sam9xe"
28	 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
29	   SoC family:
30	    o "atmel,sama5d3" shall be extended with the specific SoC compatible:
31	       - "atmel,sama5d31"
32	       - "atmel,sama5d33"
33	       - "atmel,sama5d34"
34	       - "atmel,sama5d35"
35	       - "atmel,sama5d36"
36	    o "atmel,sama5d4" shall be extended with the specific SoC compatible:
37	       - "atmel,sama5d41"
38	       - "atmel,sama5d42"
39	       - "atmel,sama5d43"
40	       - "atmel,sama5d44"
41	
42	PIT Timer required properties:
43	- compatible: Should be "atmel,at91sam9260-pit"
44	- reg: Should contain registers location and length
45	- interrupts: Should contain interrupt for the PIT which is the IRQ line
46	  shared across all System Controller members.
47	
48	System Timer (ST) required properties:
49	- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
50	- reg: Should contain registers location and length
51	- interrupts: Should contain interrupt for the ST which is the IRQ line
52	  shared across all System Controller members.
53	Its subnodes can be:
54	- watchdog: compatible should be "atmel,at91rm9200-wdt"
55	
56	TC/TCLIB Timer required properties:
57	- compatible: Should be "atmel,<chip>-tcb".
58	  <chip> can be "at91rm9200" or "at91sam9x5"
59	- reg: Should contain registers location and length
60	- interrupts: Should contain all interrupts for the TC block
61	  Note that you can specify several interrupt cells if the TC
62	  block has one interrupt per channel.
63	- clock-names: tuple listing input clock names.
64		Required elements: "t0_clk"
65		Optional elements: "t1_clk", "t2_clk"
66	- clocks: phandles to input clocks.
67	
68	Examples:
69	
70	One interrupt per TC block:
71		tcb0: timer@fff7c000 {
72			compatible = "atmel,at91rm9200-tcb";
73			reg = <0xfff7c000 0x100>;
74			interrupts = <18 4>;
75			clocks = <&tcb0_clk>;
76			clock-names = "t0_clk";
77		};
78	
79	One interrupt per TC channel in a TC block:
80		tcb1: timer@fffdc000 {
81			compatible = "atmel,at91rm9200-tcb";
82			reg = <0xfffdc000 0x100>;
83			interrupts = <26 4 27 4 28 4>;
84			clocks = <&tcb1_clk>;
85			clock-names = "t0_clk";
86		};
87	
88	RSTC Reset Controller required properties:
89	- compatible: Should be "atmel,<chip>-rstc".
90	  <chip> can be "at91sam9260" or "at91sam9g45"
91	- reg: Should contain registers location and length
92	
93	Example:
94	
95		rstc@fffffd00 {
96			compatible = "atmel,at91sam9260-rstc";
97			reg = <0xfffffd00 0x10>;
98		};
99	
100	RAMC SDRAM/DDR Controller required properties:
101	- compatible: Should be "atmel,at91rm9200-sdramc",
102				"atmel,at91sam9260-sdramc",
103				"atmel,at91sam9g45-ddramc",
104				"atmel,sama5d3-ddramc",
105	- reg: Should contain registers location and length
106	
107	Examples:
108	
109		ramc0: ramc@ffffe800 {
110			compatible = "atmel,at91sam9g45-ddramc";
111			reg = <0xffffe800 0x200>;
112		};
113	
114	SHDWC Shutdown Controller
115	
116	required properties:
117	- compatible: Should be "atmel,<chip>-shdwc".
118	  <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
119	- reg: Should contain registers location and length
120	
121	optional properties:
122	- atmel,wakeup-mode: String, operation mode of the wakeup mode.
123	  Supported values are: "none", "high", "low", "any".
124	- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
125	
126	optional at91sam9260 properties:
127	- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
128	
129	optional at91sam9rl properties:
130	- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
131	- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
132	
133	optional at91sam9x5 properties:
134	- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
135	
136	Example:
137	
138		rstc@fffffd00 {
139			compatible = "atmel,at91sam9260-rstc";
140			reg = <0xfffffd00 0x10>;
141		};
142	
143	Special Function Registers (SFR)
144	
145	Special Function Registers (SFR) manage specific aspects of the integrated
146	memory, bridge implementations, processor and other functionality not controlled
147	elsewhere.
148	
149	required properties:
150	- compatible: Should be "atmel,<chip>-sfr", "syscon".
151	  <chip> can be "sama5d3" or "sama5d4".
152	- reg: Should contain registers location and length
153	
154		sfr@f0038000 {
155			compatible = "atmel,sama5d3-sfr", "syscon";
156			reg = <0xf0038000 0x60>;
157		};
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