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Documentation / devicetree / bindings / arm / atmel-at91.txt




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Based on kernel version 4.3. Page generated on 2015-11-02 12:44 EST.

1	Atmel AT91 device tree bindings.
2	================================
3	
4	Boards with a SoC of the Atmel AT91 or SMART family shall have the following
5	properties:
6	
7	Required root node properties:
8	compatible: must be one of:
9	 * "atmel,at91rm9200"
10	
11	 * "atmel,at91sam9" for SoCs using an ARM926EJ-S core, shall be extended with
12	   the specific SoC family or compatible:
13	    o "atmel,at91sam9260"
14	    o "atmel,at91sam9261"
15	    o "atmel,at91sam9263"
16	    o "atmel,at91sam9x5" for the 5 series, shall be extended with the specific
17	      SoC compatible:
18	       - "atmel,at91sam9g15"
19	       - "atmel,at91sam9g25"
20	       - "atmel,at91sam9g35"
21	       - "atmel,at91sam9x25"
22	       - "atmel,at91sam9x35"
23	    o "atmel,at91sam9g20"
24	    o "atmel,at91sam9g45"
25	    o "atmel,at91sam9n12"
26	    o "atmel,at91sam9rl"
27	    o "atmel,at91sam9xe"
28	 * "atmel,sama5" for SoCs using a Cortex-A5, shall be extended with the specific
29	   SoC family:
30	    o "atmel,sama5d2" shall be extended with the specific SoC compatible:
31	       - "atmel,sama5d27"
32	    o "atmel,sama5d3" shall be extended with the specific SoC compatible:
33	       - "atmel,sama5d31"
34	       - "atmel,sama5d33"
35	       - "atmel,sama5d34"
36	       - "atmel,sama5d35"
37	       - "atmel,sama5d36"
38	    o "atmel,sama5d4" shall be extended with the specific SoC compatible:
39	       - "atmel,sama5d41"
40	       - "atmel,sama5d42"
41	       - "atmel,sama5d43"
42	       - "atmel,sama5d44"
43	
44	PIT Timer required properties:
45	- compatible: Should be "atmel,at91sam9260-pit"
46	- reg: Should contain registers location and length
47	- interrupts: Should contain interrupt for the PIT which is the IRQ line
48	  shared across all System Controller members.
49	
50	System Timer (ST) required properties:
51	- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
52	- reg: Should contain registers location and length
53	- interrupts: Should contain interrupt for the ST which is the IRQ line
54	  shared across all System Controller members.
55	- clocks: phandle to input clock.
56	Its subnodes can be:
57	- watchdog: compatible should be "atmel,at91rm9200-wdt"
58	
59	TC/TCLIB Timer required properties:
60	- compatible: Should be "atmel,<chip>-tcb".
61	  <chip> can be "at91rm9200" or "at91sam9x5"
62	- reg: Should contain registers location and length
63	- interrupts: Should contain all interrupts for the TC block
64	  Note that you can specify several interrupt cells if the TC
65	  block has one interrupt per channel.
66	- clock-names: tuple listing input clock names.
67		Required elements: "t0_clk", "slow_clk"
68		Optional elements: "t1_clk", "t2_clk"
69	- clocks: phandles to input clocks.
70	
71	Examples:
72	
73	One interrupt per TC block:
74		tcb0: timer@fff7c000 {
75			compatible = "atmel,at91rm9200-tcb";
76			reg = <0xfff7c000 0x100>;
77			interrupts = <18 4>;
78			clocks = <&tcb0_clk>;
79			clock-names = "t0_clk";
80		};
81	
82	One interrupt per TC channel in a TC block:
83		tcb1: timer@fffdc000 {
84			compatible = "atmel,at91rm9200-tcb";
85			reg = <0xfffdc000 0x100>;
86			interrupts = <26 4 27 4 28 4>;
87			clocks = <&tcb1_clk>;
88			clock-names = "t0_clk";
89		};
90	
91	RSTC Reset Controller required properties:
92	- compatible: Should be "atmel,<chip>-rstc".
93	  <chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
94	- reg: Should contain registers location and length
95	- clocks: phandle to input clock.
96	
97	Example:
98	
99		rstc@fffffd00 {
100			compatible = "atmel,at91sam9260-rstc";
101			reg = <0xfffffd00 0x10>;
102			clocks = <&clk32k>;
103		};
104	
105	RAMC SDRAM/DDR Controller required properties:
106	- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
107				"atmel,at91sam9260-sdramc",
108				"atmel,at91sam9g45-ddramc",
109				"atmel,sama5d3-ddramc",
110	- reg: Should contain registers location and length
111	
112	Examples:
113	
114		ramc0: ramc@ffffe800 {
115			compatible = "atmel,at91sam9g45-ddramc";
116			reg = <0xffffe800 0x200>;
117		};
118	
119	SHDWC Shutdown Controller
120	
121	required properties:
122	- compatible: Should be "atmel,<chip>-shdwc".
123	  <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
124	- reg: Should contain registers location and length
125	- clocks: phandle to input clock.
126	
127	optional properties:
128	- atmel,wakeup-mode: String, operation mode of the wakeup mode.
129	  Supported values are: "none", "high", "low", "any".
130	- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
131	
132	optional at91sam9260 properties:
133	- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
134	
135	optional at91sam9rl properties:
136	- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
137	- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
138	
139	optional at91sam9x5 properties:
140	- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
141	
142	Example:
143	
144		shdwc@fffffd10 {
145			compatible = "atmel,at91sam9260-shdwc";
146			reg = <0xfffffd10 0x10>;
147			clocks = <&clk32k>;
148		};
149	
150	Special Function Registers (SFR)
151	
152	Special Function Registers (SFR) manage specific aspects of the integrated
153	memory, bridge implementations, processor and other functionality not controlled
154	elsewhere.
155	
156	required properties:
157	- compatible: Should be "atmel,<chip>-sfr", "syscon".
158	  <chip> can be "sama5d3" or "sama5d4".
159	- reg: Should contain registers location and length
160	
161		sfr@f0038000 {
162			compatible = "atmel,sama5d3-sfr", "syscon";
163			reg = <0xf0038000 0x60>;
164		};
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