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Documentation / devicetree / bindings / arm / primecell.txt




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Based on kernel version 3.16. Page generated on 2014-08-06 21:36 EST.

1	* ARM Primecell Peripherals
2	
3	ARM, Ltd. Primecell peripherals have a standard id register that can be used to
4	identify the peripheral type, vendor, and revision. This value can be used for
5	driver matching.
6	
7	Required properties:
8	
9	- compatible : should be a specific name for the peripheral and
10	               "arm,primecell".  The specific name will match the ARM
11	               engineering name for the logic block in the form: "arm,pl???"
12	
13	Optional properties:
14	
15	- arm,primecell-periphid : Value to override the h/w value with
16	- clocks : From common clock binding. First clock is phandle to clock for apb
17		pclk. Additional clocks are optional and specific to those peripherals.
18	- clock-names : From common clock binding. Shall be "apb_pclk" for first clock.
19	- dmas : From common DMA binding. If present, refers to one or more dma channels.
20	- dma-names : From common DMA binding, needs to match the 'dmas' property.
21	              Devices with exactly one receive and transmit channel shall name
22	              these "rx" and "tx", respectively.
23	- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt
24	- pinctrl-names : Names corresponding to the numbered pinctrl states
25	- interrupts : one or more interrupt specifiers
26	- interrupt-names : names corresponding to the interrupts properties
27	
28	Example:
29	
30	serial@fff36000 {
31		compatible = "arm,pl011", "arm,primecell";
32		arm,primecell-periphid = <0x00341011>;
33	
34		clocks = <&pclk>;
35		clock-names = "apb_pclk";
36	
37		dmas = <&dma-controller 4>, <&dma-controller 5>;
38		dma-names = "rx", "tx";	
39	
40		pinctrl-0 = <&uart0_default_mux>, <&uart0_default_mode>;
41		pinctrl-1 = <&uart0_sleep_mode>;
42		pinctrl-names = "default","sleep";
43	
44		interrupts = <0 11 0x4>;
45	};
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