Based on kernel version 6.8
. Page generated on 2024-03-11 21:26 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 | High-Frequency PLL (HFPLL) PROPERTIES - compatible: Usage: required Value type: <string>: shall contain only one of the following. The generic compatible "qcom,hfpll" should be also included. "qcom,hfpll-ipq8064", "qcom,hfpll" "qcom,hfpll-apq8064", "qcom,hfpll" "qcom,hfpll-msm8974", "qcom,hfpll" "qcom,hfpll-msm8960", "qcom,hfpll" "qcom,msm8976-hfpll-a53", "qcom,hfpll" "qcom,msm8976-hfpll-a72", "qcom,hfpll" "qcom,msm8976-hfpll-cci", "qcom,hfpll" - reg: Usage: required Value type: <prop-encoded-array> Definition: address and size of HPLL registers. An optional second element specifies the address and size of the alias register region. - clocks: Usage: required Value type: <prop-encoded-array> Definition: reference to the xo clock. - clock-names: Usage: required Value type: <stringlist> Definition: must be "xo". - clock-output-names: Usage: required Value type: <string> Definition: Name of the PLL. Typically hfpllX where X is a CPU number starting at 0. Otherwise hfpll_Y where Y is more specific such as "l2". Example: 1) An HFPLL for the L2 cache. clock-controller@f9016000 { compatible = "qcom,hfpll-ipq8064", "qcom,hfpll"; reg = <0xf9016000 0x30>; clocks = <&xo_board>; clock-names = "xo"; clock-output-names = "hfpll_l2"; }; 2) An HFPLL for CPU0. This HFPLL has the alias register region. clock-controller@f908a000 { compatible = "qcom,hfpll-ipq8064", "qcom,hfpll"; reg = <0xf908a000 0x30>, <0xf900a000 0x30>; clocks = <&xo_board>; clock-names = "xo"; clock-output-names = "hfpll0"; }; |