Based on kernel version 6.8
. Page generated on 2024-03-11 21:26 EST
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- $id: http://devicetree.org/schemas/clock/st,stm32mp25-rcc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: STM32MP25 Reset Clock Controller maintainers: - Gabriel Fernandez <gabriel.fernandez@foss.st.com> description: | The RCC hardware block is both a reset and a clock controller. RCC makes also power management (resume/supend). See also:: include/dt-bindings/clock/st,stm32mp25-rcc.h include/dt-bindings/reset/st,stm32mp25-rcc.h properties: compatible: enum: - st,stm32mp25-rcc reg: maxItems: 1 '#clock-cells': const: 1 '#reset-cells': const: 1 clocks: items: - description: CK_SCMI_HSE High Speed External oscillator (8 to 48 MHz) - description: CK_SCMI_HSI High Speed Internal oscillator (~ 64 MHz) - description: CK_SCMI_MSI Low Power Internal oscillator (~ 4 MHz or ~ 16 MHz) - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz) - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz) clock-names: items: - const: hse - const: hsi - const: msi - const: lse - const: lsi required: - compatible - reg - '#clock-cells' - '#reset-cells' - clocks - clock-names additionalProperties: false examples: - | #include <dt-bindings/clock/st,stm32mp25-rcc.h> rcc: clock-controller@44200000 { compatible = "st,stm32mp25-rcc"; reg = <0x44200000 0x10000>; #clock-cells = <1>; #reset-cells = <1>; clock-names = "hse", "hsi", "msi", "lse", "lsi"; clocks = <&scmi_clk CK_SCMI_HSE>, <&scmi_clk CK_SCMI_HSI>, <&scmi_clk CK_SCMI_MSI>, <&scmi_clk CK_SCMI_LSE>, <&scmi_clk CK_SCMI_LSI>; }; ... |